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ADP198ACBZ-11-R7 数据表(PDF) 11 Page - Analog Devices |
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ADP198ACBZ-11-R7 数据表(HTML) 11 Page - Analog Devices |
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11 / 16 page ![]() Data Sheet ADP198 Rev. D | Page 11 of 16 THEORY OF OPERATION GND EN VIN SEL0 SEL1 VOUT ADP198 SLEW RATE CONTROL LEVEL SHIFT REVERSE POLARITY PROTECTION Figure 22. Functional Block Diagram The ADP198 is a high-side PMOS load switch that is designed for supply operation between 1.65 V and 6.5 V. The PMOS load switch has a low on resistance of 50 mΩ at VIN = 3.3 V and supports 1 A of continuous load current. The ADP198 features low quiescent current at 2.5 μA typical using a 2.8 V supply. The enable input incorporates a nominal 4 MΩ pull-down resistor. SEL0 and SEL1 program the start-up time of the load switch to reduce inrush current when the switch is turned on. The reverse current protection circuitry prevents current from flowing backwards through the ADP198 when the output voltage is greater than the input voltage. A comparator senses the differ- ence between the input and output voltages. When the difference between the input voltage and output voltage exceeds 75 mV, the body of the PFET is switched to VOUT and turned off or opened. In other words, the gate is connected to VOUT. The packaging is a space-saving 1 mm × 1 mm, 4-ball WLCSP. The ADP198 is also available in a 2 mm × 2 mm × 0.55 mm, 0.5 mm pitch LFCSP. |
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