Data Sheet

ADP1876

Rev. A | Page 23 of 24

reduce overshoot and is generally between 2 Ω and 4 Ω. Adding

a resistor in series, typically between 2 Ω and 4 Ω, with the gate

driver also helps to reduce overshoot. If a gate resistor is added,

Figure 32. Application Circuit with a Snubber

PCB LAYOUT GUIDELINE

For additional information about PCB layout, see the AN-1119

Application Note, Printed Circuit Board Layout Guidelines for

Step-Down Regulators, Optimizing for Low Noise Design with

Dual Channel Switching Controllers.

TYPICAL APPLICATIONS CIRCUIT

Figure 33. Typical Applications Circuit

ADP1876

(CHANNEL 1)

DH1

VDL

DL1

ILIM1

SW1

BST1

PGND1

M1

M2

L

750kΩ

EN1

VIN

100nF

TO

VIN

VINLDO

VOUTLDO

VCCO

VDL

AGND

NC

SW1

DH1

PGND1

DL1

DL2

PGND2

DH2

SW2

ADP1876

1

2

3

4

5

6

7

8

24

23

22

21

20

19

18

17

32

31

30

29

28

27

26

25

9

10

11

12

13

14

15

16

INPUT

3V TO 5.5V

12.4kΩ

10pF

120pF

44.2kΩ

22pF

330pF

100nF

0.1µF

0.1µF

1µF

4.7µF

1µF

2.1k

Ω

L2

M4

M3

CIN2

1.8V@

13A

2.1k

Ω

L1

M2

M1

22k

Ω

22kΩ

CIN1

CIN

5V@

13A

20kΩ

AGND

PGND

10kΩ

CIN1, CIN2: 10µF/X7R/25V/1210 × 2, GRM32DR71E106KA12, MUR ATA

CIN = 150µF/20V, OS-CON, 20SEP150M, SANYO

L1, L2: 1.2µH, WURTH ELEKTRONIK, 744325120

M1, M3: BSC080N03LS

M2, M4: BSC030N03LS

73.2kΩ

10kΩ

1µF

VOUTLDO