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ADP2370ACPZ-5.0-R7 数据表(PDF) 4 Page - Analog Devices

部件名 ADP2370ACPZ-5.0-R7
功能描述  High Voltage, 1.2 MHz/600 kHz, 800 mA
PDF  32 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP2370ACPZ-5.0-R7 数据表(HTML) 4 Page - Analog Devices

  ADP2370ACPZ-5.0-R7 Datasheet HTML 1Page - Analog Devices ADP2370ACPZ-5.0-R7 Datasheet HTML 2Page - Analog Devices ADP2370ACPZ-5.0-R7 Datasheet HTML 3Page - Analog Devices ADP2370ACPZ-5.0-R7 Datasheet HTML 4Page - Analog Devices ADP2370ACPZ-5.0-R7 Datasheet HTML 5Page - Analog Devices ADP2370ACPZ-5.0-R7 Datasheet HTML 6Page - Analog Devices ADP2370ACPZ-5.0-R7 Datasheet HTML 7Page - Analog Devices ADP2370ACPZ-5.0-R7 Datasheet HTML 8Page - Analog Devices ADP2370ACPZ-5.0-R7 Datasheet HTML 9Page - Analog Devices Next Button
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ADP2370/ADP2371
Data Sheet
Rev. A | Page 4 of 32
Parameter
Symbol
Test Conditions/Comments
Min
Typ
Max
Unit
Frequency Synchronization Range
fSYNC_RANGE
FSEL = 0 V, 3.2 V ≤ VIN ≤ 15 V
400
800
kHz
FSEL = VIN, 3.2 V ≤ VIN ≤ 15 V
0.8
1.6
MHz
Synchronization Threshold
High
SYNCHIGH
3.2 V ≤ VIN ≤ 15 V
1.2
V
Low
SYNCLOW
3.2 V ≤ VIN ≤ 15 V
0.4
V
Hysteresis
SYNCHYS
3.2 V ≤ VIN ≤ 15 V
200
mV
Typical Sync Duty Cycle Range
SYNCDUTY
VIN (1.2 MHz), 3.2 V ≤ VIN ≤ 5 V, FSEL = VIN
20
55
%
VIN (1.2 MHz), 5 V ≤ VIN ≤ 15 V, FSEL = VIN
20
70
%
SYNC Pin Leakage Current
SYNCLKG
SYNC = 0 V or SYNC = VIN
0.05
1
μA
FSEL Threshold
3.2 V ≤ VIN ≤ 15 V
High
FESLHIGH
1
V
Low
FSELLOW
0.4
V
Hysteresis
FSELHYS
125
mV
FSEL Pin Leakage Current
FSELLKG
FSEL = 0 V or FSEL = VIN
0.04
1
μA
POWER GOOD (PG PIN)
PG Threshold
3.2 V ≤ VIN ≤ 15 V
Rising
PGRISE
92
95
%
Falling
PGFALL
82.5
87
%
Hysteresis
PGHYS
5
%
PG Output Low
PGLOW
Pull-up current < 1 mA
0.3
V
PG Delay
Rising
PGDELAYRISE
VOUT crossing PG rising threshold, pull-up
current < 1 mA
20
μs
Falling
PGDELAYFALL
VOUT crossing PG falling threshold, pull-up
current < 1 mA
0.5
μs
PG Leakage
PGLKG
0.04
1
μA
UNDERVOLTAGE LOCKOUT (UVLO)
Input Voltage Rising
UVLORISE
3.19
V
Input Voltage Falling
UVLOFALL
2.80
V
Hysteresis
UVLOHYS
190
mV
ENABLE INPUT STANDBY (EN PIN)
3.2 V ≤ VIN ≤ 15 V
EN Input Logic
V
High
ENSTBY-HIGH
1
Low
ENSTBY-LOW
0.4
V
Hysteresis
ENSTBY-HYS
125
mV
ENABLE INPUT PRECISION (EN PIN)
3.2 V ≤ VIN ≤ 15 V
EN Input Logic
High
ENHIGH
1.135
1.2
1.26
V
Low
ENLOW
1.045
1.1
1.155
V
Hysteresis
ENHYS
100
mV
EN Input Leakage Current
IEN-LKG
EN = VIN or GND
0.05
1
µA
EN Input Delay Time
TIEN-DLY
For VOUT = 0 V to 0.1 × VOUT when EN rises from
0 V to VIN
70
μs
THERMAL SHUTDOWN
3.2 V ≤ VIN ≤ 15 V
Thermal Shutdown Threshold
TSSD
TJ rising
150
°C
Thermal Shutdown Hysteresis
TSSD-HYS
15
°C



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