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ADP2370ACPZ-5.0-R7 数据表(PDF) 23 Page - Analog Devices

部件名 ADP2370ACPZ-5.0-R7
功能描述  High Voltage, 1.2 MHz/600 kHz, 800 mA
PDF  32 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP2370ACPZ-5.0-R7 数据表(HTML) 23 Page - Analog Devices

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Data Sheet
ADP2370/ADP2371
Rev. A | Page 23 of 32
100% DUTY CYCLE
The ADP2370/ADP2371 enter and exit 100% duty cycle smoothly.
The control loop seeks the next clock cycle while the high-side
switch is engaged. When this occurs, the clock signal is masked
and the PMOS remains on. When the input voltage increases, the
internal VCOMP node decreases its signal to the control loop; thus,
the device stops skipping clock cycles and exits 100% duty cycle.
M2.00ms
A CH1
4.90V
T
32.20%
CH1 1.00V BW
CH3 50.0mA
BW
CH2 1.00V BW
VIN
VOUT
INDUCTOR CURRENT
1
2
3
Figure 74. Transition into and out of Dropout in PSM Mode,
VOUT = 5 V, 100 mA Load
M2.00ms
A CH1
4.90V
T
32.20%
CH1 1.00V BW
CH3 50.0mA
BW
CH2 1.00V BW
VIN
VOUT
INDUCTOR CURRENT
1
2
3
Figure 75. Transition into and out of Dropout in PWM Mode,
VOUT = 5 V, 100 mA Load
SYNCHRONIZING
It is possible to synchronize the ADP2370/ADP2371 to an external
clock within a frequency range from 400 kHz to 1.6 MHz. The
device automatically detects the rising edge of the first clock
and synchronizes to the external clock. When the clock signal
stops, the device automatically switches back to the internal
clock and continues operating.
The switchover is initiated when no rising edge on the SYNC
pin can be detected on the internal clock for a duration of four
clock cycles. Therefore, the maximum delay time can be 6.7 µs if
the internal clock is running at its minimum frequency of 600 kHz.
During this time, there is no clock signal available. The output
stops switching until the ADP2370 circuitry switches to the
internal clock signal.
If the device is synchronized to an external clock, the PSM
mode is disabled and the device stays in forced PWM mode.
Connect FSEL to ground when synchronizing to a frequency
range from 400 kHz to 800 kHz, and connect FSEL to the input
voltage when the external frequency is in the range of 800 kHz
to 1600 kHz. FSEL has an internal pull-down resistor and
defaults to the 600 kHz mode when FSEL is unconnected.
1
2
3
INTERNAL 1.2MHZ
INTERNAL 600kHZ
SYNC
PWM CLOCK (IF FSEL = 1)
PWM CLOCK FOLLOWS SYNC UNTIL IT MISSES
4 × 1.2MHZ INTERNAL CLOCK CYCLES
PWM CLOCK (IF FSEL = 0)
4
Figure 76. Typical SYNC Timing
M20.0µs
A CH4
2.00V
T
20.0%
CH1 5.00V BW
CH3 200mA
BW CH4 5.00V
B
W
CH2 100mV
B
W
SW
VOUT
INDUCTOR CURRENT
SYNC
1
2
3
4
Figure 77. Typical SYNC Transient, 1.2 MHz to 800 kHz to 1.2 MHz
M20.0µs
A CH4
2.00V
T
20.0%
CH1 5.00V BW
CH3 200mA
BW CH4 5.00V
B
W
CH2 50.0mV
B
W
SW
VOUT
INDUCTOR CURRENT
SYNC
1
2
3
4
Figure 78. SYNC Transient 1.2 MHz to 800 kHz



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