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ADP2381AREZ-R7 数据表(PDF) 21 Page - Analog Devices

部件名 ADP2381AREZ-R7
功能描述  20 V, 6 A Synchronous Step-Down
PDF  28 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP2381AREZ-R7 数据表(HTML) 21 Page - Analog Devices

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Data Sheet
ADP2381
Rev. 0 | Page 21 of 28
LOW-SIDE MOSFET SELECTION
A low RDSON N-channel MOSFET is selected as a high efficiency
solution. The breakdown voltage of the MOSFET must be
higher than 1.2 × VIN, and the drain current must be larger than
1.2 × ILIMIT.
It is recommended that a 30 V, N-channel MOSFET, such as the
FDS6298 from Fairchild, be used. The RDSON of the FDS6298 at
a 4.5 V driver voltage is 9.4 mΩ, and the total gate charge at 5 V
is 10 nC.
COMPENSATION COMPONENTS
For a better load transient and stability performance, set the
cross frequency, fC, at fSW/10. In this case, fC = 1/500 kHz =
50 kHz.
)
)(
(
)
)(
(
_
_
_
0
_
A
r
C
R
B
C
C
R
r
C
C
C
R
B
R
A
r
C
R
B
C
C
R
r
g
B
C
0
C
C
CP
C
C
0
EA
CP
EA
C
C
C
EA
C
0
C
C
CP
C
C
m
EA
C
+
+
=
+
=
+
+
−
×
=
where:
kΩ
3
.
37
/
7
.
8
μS
500
V
6
.
0
kHz
50
μF
94
3
.
3
2
2
=
×
×
×
×
×
×
=
×
×
×
×
×
×
=
V
A
V
A
g
V
f
C
V
R
VI
m
REF
C
OUT
OUT
C
π
π
nF
39
.
1
kΩ
3
.
37
μF
94
)
002
.
0
A
6
/
V
3
.
3
(
)
(
=
×
Ω
+
=
×
+
=
C
OUT
ESR
C
R
C
R
R
C
pF
04
.
5
kΩ
3
.
37
μF
94
002
.
0
=
×
Ω
=
×
=
C
OUT
ESR
CP
R
C
R
C
(
)
(
)
7
10
62
.
3
MΩ
40
μS
500
1
kΩ
21
.
2
kΩ
10
kΩ
2.21
kΩ
10
1
×
=
×
+
×
+
×
=
×
+
+
=
0
m
BOT
TOP
BOT
TOP
r
g
R
R
R
R
A
6
7
10
46
.
1
)
MΩ
40
10
62
.
3
(
μS
500
1
)
nF
39
.
1
pF
04
.
5
(
MΩ
40
)
(
1
)
(
−
×
=
+
×
×
+
+
×
=
+
+
+
=
0
m
C
CP
0
r
A
g
C
C
r
B
This results in
RC_EA = 73.3 kΩ.
CC_EA = 727.6 pF.
CCP_EA = 2.56 pF.
Choose the standard values for RC_EA = 73.2 kΩ, CC_EA = 820 pF,
and CCP_EA = 2.2 pF.
Figure 35 shows the bode plot at 6 A. The cross frequency is
kHz, and the phase margin is 61°.
Figure 35. Bode Plot at 6 A
SOFT START TIME PROGRAM
The soft start feature allows the output voltage to ramp up in a
controlled manner, eliminating output voltage overshoot during
soft start and limiting the inrush current. Set the soft start time
to 4 ms.
nF
22
V
6
.
0
μA
3
.
3
ms
4
6
.
0
_
_
=
×
=
×
=
UP
SS
EXT
SS
SS
I
t
C
Choose a standard component value, CSS = 22 nF.
INPUT CAPACITOR SELECTION
A minimum 10 μF ceramic capacitor is required to be placed
near the PVIN pin. In this application, one 10 μF, X5R, 25 V
ceramic capacitor is recommended.
SCHEMATIC OF DESIGN EXAMPLE
See Figure 36 for a schematic of the design example.
60
48
36
24
12
0
–60
–48
–36
–24
–12
180
144
108
72
36
0
–180
–144
–108
–72
–36
1k
10k
100k
1M
FREEQUENCY (Hz)



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