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SSM2804CBZ-R7 数据表(PDF) 14 Page - Analog Devices

部件名 SSM2804CBZ-R7
功能描述  Audio Subsystem with Class-D Speaker
PDF  36 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

SSM2804CBZ-R7 数据表(HTML) 14 Page - Analog Devices

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SSM2804
Rev. 0 | Page 14 of 36
HARDWARE-BASED HEADPHONE LIMITER
To provide fail-safe headphone level limiting independent of
the register values sent to the amplifier over the I2C bus, the
SSM2804 incorporates an optional hardware-based headphone
limiter feature. The user controls the limiter level by supplying
a voltage at the SD pin (see
). The hardware limiter is
activated by setting the LIM_MODE bit to 0 in the additional
control register (Bit D3 of Register 0x0E). After the desired
limiter value is set, the user can lock the limiter setting by
setting the LIMLOCK bit (Bit D7 of Register 0x0E).
Table 7
Table 7. Hardware Limiter Options
Limiter
Level
Power into
32 Ω (mW)
Power into
16 Ω (mW)
SD Pin Voltage
Shutdown
N/A
N/A
<0.87 V
±0.40 V
2.5
5
0.87 V < V
SD < 1.08 V
±8 V
10
20
1.08 V < V
SD < 1.29 V
±1.13 V
20
40
V
SD > 1.29 V
Note that after the hardware limiter lock bit is set, the locked
levels cannot be reset until the SSM2804 is powered down, the
SD pin is strobed low, or all eight bits of the software reset
register (Register 0x10) are set to 0.
In addition to the hardware-based limiter, several other limiter
levels can be selected using the I2C-based limiter function (set
the HPLIM bits of Register 0x0E; see Table 44). The effect of
the limiter function on the headphone output is shown in
Figure 29.
CH1 500mV BW
M20.0ms
A CH1
110mV
Figure 29. Limited Headphone Signal
ACTIVATING OR DEACTIVATING THE EMISSION
LIMITING CIRCUITRY
To activate or deactivate the emission limiting circuitry, change
the value of the EDGE bits in the additional control register
(Bits[D1:D0] of Register 0x0E). Four levels of emission control
are available, allowing the user to determine the best trade-off
between efficiency and EMI reduction.
In the default (fastest edge) mode, the user can pass FCC
Class-B emission testing with 10 cm twisted pair speaker wire
for loudspeaker connection. If longer speaker wire is desired,
change the EDGE setting to a slower edge rate mode.
The trade-off is slightly lower efficiency and noise performance.
The penalty for using the emission control circuitry is far less
than the decreased performance observed when using a ferrite
bead based EMI filter for emission limiting purposes.
AUTOMATIC LEVEL CONTROL (ALC)
Automatic level control (ALC) is a function that automatically
adjusts amplifier gain to generate the desired output amplitude
with reference to a particular input stimulus. The primary use for
the ALC is to protect an audio power amplifier or speaker load
from the damaging effects of clipping or current overloading.
This is accomplished by limiting the output amplitude of the
amplifier upon reaching a preset threshold voltage. Another
benefit of the ALC is that it makes sound sources with a wide
dynamic range more intelligible by boosting low level signals
and limiting very high level signals.
Before activating the ALC by setting the ALCEN bit (Bit D7
of Register 0x0B), the user has full control of the left and right
channel PGA gain. After the ALC is activated (ALCEN = 1),
the user has no control over the gain settings; the left channel
PGA gain is locked into the device and controls the gain for both
the left and right channels. To change the gain, the user must
reset the ALCEN bit to 0 and then load the new gain settings.
Figure 30 shows the response of the SSM2804 to a linearly
increasing input signal. When the output reaches the current
threshold value, the amplifier gain decreases by 0.5 dB so that
the output voltage remains under the threshold. As more atten-
uation is added to the system, the threshold increases according
to a profile determined by the compressor setting bits in the
ALC Control 2 register (Bits[D6:D5] of Register 0x0B), causing
a rounded “knee” as the output voltage approaches the output
limiter level. The effect of this compression curve is shown in
Figure 30.
5.6
5.2
4.8
4.4
4.0
3.6
3.2
2.8
2.4
1.6
1.2
2.0
0.8
0.4
0
0
20
40
60
80
100
120
140
160
180
200
TIME (ms)
INPUT
GAIN = 6dB
GAIN = 12dB
GAIN = 18dB
GAIN = 24dB
Figure 30. Output Response to Linearly Increasing Input Ramp Signal
When the input level is small and the output voltage is smaller
than the ALC threshold value, the gain of the amplifier stays at
the preset gain setting. When the input exceeds the ALC thresh-
old value, the ALC gradually reduces the gain from the preset
gain setting down to 1 dB.



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