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SSM2804CBZ-R7 数据表(PDF) 21 Page - Analog Devices

部件名 SSM2804CBZ-R7
功能描述  Audio Subsystem with Class-D Speaker
PDF  36 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

SSM2804CBZ-R7 数据表(HTML) 21 Page - Analog Devices

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SSM2804
Rev. 0 | Page 21 of 36
REGISTER MAP DETAILS
INPUT CHANNEL MODE CONTROL, ADDRESS 0x00
Table 10. Input Channel Mode Control Register Bit Map
D7
D6
D5
D4
D3
D2
D1
D0
0
ZCD
GAINMOD[2:0]
INMOD[2:0]
Table 11. Input Channel Mode Control Register Bit Descriptions
Bit Name
Description
Settings
ZCD
Zero cross-detector enable
0 = disable (default)
1 = enable
GAINMOD[2:0]
Input amplifier gain mode
xx0 = Input A PGA mode
xx1 = Input A boost mode
x0x = Input B PGA mode
x1x = Input B boost mode
0xx = Input C PGA mode
1xx = Input C boost mode
INMOD[2:0]
Input mode control
xx0 = Input A stereo mode (INA1, INA2 > INAL, INAR)
xx1 = Input A differential mode (INA1, INA2 > INA+, INA−)
x0x = Input B stereo mode (INB1, INB2 > INBL, INBR)
x1x = Input B differential mode (INB1, INB2 > INB+, INB−)
0xx = Input C stereo mode (INC1, INC2 > INCL, INCR)
1xx = Input C differential mode (INC1, INC2 > INC+, INC−)
See Table 12 for complete information about the naming table
Table 12. Input Mode Naming Table
INMOD[2:0]
INA1 Pin
INA2 Pin
INB1 Pin
INB2 Pin
INC1 Pin
INC2 Pin
000
INAL
INAR
INBL
INBR
INCL
INCR
001
INAL
INAR
INBL
INBR
INC+
INC−
010
INAL
INAR
INB+
INB−
INCL
INCR
011
INAL
INAR
INB+
INB−
INC+
INC−
100
INA+
INA−
INBL
INBR
INCL
INCR
101
INA+
INA−
INBL
INBR
INC+
INC−
110
INA+
INA−
INB+
INB−
INCL
INCR
111
INA+
INA−
INB+
INB−
INC+
INC−



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