MMA6525KWR2 datasheet(3/56 Pages) FREESCALE

3 / 56 page

Sensor

Freescale Semiconductor, Inc.

MMA65xx

Figure 2. Internal Block Diagram

Figure 3. Device Orientation Diagram

Figure 4. Part Marking

SINC Filter

ΣΔ

Converter

Compensation

Low-Pass Filter

Oscillator

8 MHz

1 MHz

Regulator

Digital

X-Axis g-Cell

Over-Damped

ARM_Y

Y-Axis g-Cell

Over-Damped

SINC Filter

Compensation

Low-Pass Filter

Cancellation

Offset

ARM_X

VREGA

VREG

Monitor

Clock

VREGA

VREG

VCC

IIR

Cancellation

Offset

ARM_Y

ARM_X

SCLK

MOSI

MISO

Y-Axis Register

Array

Generation

Clock CRC

Generation

Clock CRC

SPI

Y-Axis

I/O

SPI

Mismatch

SPI

X-Axis Register

Array

Verification

Clock & bias

Generator

ΣΔ

Converter

Clock & bias

Generator

SPI

X-Axis

OTP

Array

Memory

Analog

Regulator

Self

Test

Voltage

Monitoring

Linear

Interpolation

Linear

Interpolation

Output

Scaling

Output

Scaling

Offset

Monitor

Offset

Monitor

VCC

VREG

VREGA

VSS

X: 0 g

Y: -1 g

EARTH GROUND

X: +1 g

Y: 0 g

X: 0 g

Y: +1 g

X: -1 g

Y: 0 g

X: 0 g

Y: 0 g

X: 0 g

Y: 0 g

xxxxxxx

MMA65xx(K)W

AWLYWWZ

Data Code Legend:

A: Assembly Location

WL: Wafer Lot Number (g-cell Lot Number)

Y: Year

WW: Work Week

Z: Assembly Lot Number

MMA6525KWR2 数据表(PDF) 3 Page - Freescale Semiconductor, Inc

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