MMA6525KWR2 datasheet(18/56 Pages) FREESCALE

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Freescale Semiconductor, Inc.

MMA65xx

3.1.8

Arming Configuration Registers (ARMCFGX, ARMCFGY)

The arming configuration registers contain configuration information for the arming function. The values in these registers are

only relevant if the arming function is operating in moving average mode, or count mode.

These registers can be written during initialization but are locked once the ENDINIT bit is set. Refer to Section 3.1.6.3. These

registers are included in the writable register CRC check. Refer to Section 3.2.2 for details.

3.1.9

Reserved Bits (Reserved)

Bits 7 through 6 of the ARMCFGX and ARMCFGY registers are reserved. A write to the reserved bits must always be logic ‘0’

for normal device operation and performance.

3.1.9.1

Arming Pulse Stretch (APS_X[1:0], APS_Y[1:0])

The APS_X[1:0] and APS_Y[1:0] bits set the programmable pulse stretch time for the arming outputs. Refer to Section 3.8.10

for more details regarding the arming function. Pulse stretch times are derived from the internal oscillator, so the tolerance on

this oscillator applies.

3.1.9.2

Arming Window Size (AWS_Xx[1:0], AWS_Yx[1:0])

The AWS_Xx[1:0] & AWS_Yx[1:0] bits have different functions depending on the state of the A_CFG bits in the DEVCFG reg-

ister. If the arming function is set to moving average mode, the AWS bits set the number of acceleration samples used for the

arming function moving average. The number of samples is set independently for each axis and polarity. If the arming function

is set to count mode, the AWS bits set the sample count limit for the arming function. The sample count limit is set independently

for each axis. Refer to Section 3.8.10 for more details regarding the arming function.

Table 12. Arming Configuration Register

Location

Bit

Address

76543210

$0E

ARMCFGX

Reserved

APS_X[1]

APS_X[0]

AWS_XN[1]

AWS_XN[0]

AWS_XP[1]

AWS_XP[0]

$0F

ARMCFGY

Reserved

APS_Y[1]

APS_Y[0]

AWS_YN[1]

AWS_YN[0]

AWS_YP[1]

AWS_YP[0]

Reset Value

00001111

Table 13. Arming Pulse Stretch Definitions

APS_X[1], APS_Y[1]

APS_X[0], APS_Y[0]

Pulse Stretch Time (Typical Oscillator)

0 mS

16.256 ms - 16.384 ms

65.408ms - 65.536 ms

261.888ms - 262.016 ms

Table 14. X-Axis Positive Arming Window Size Definitions (Moving Average Mode)

AWS_XP[1]

AWS_XP[0]

X-Axis Positive Window Size

Table 15. X-Axis Negative Arming Window Size Definitions (Moving Average Mode)

AWS_XN[1]

AWS_XN[0]

X-Axis Negative Window Size

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