M200 datasheet(1/17 Pages) CYPRESS

部件名	M200

功能描述	Two-PLL Programmable Clock Generator for Portable Applications

PDF	17 Pages

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制造商	CYPRESS [Cypress Semiconductor]

网页	http://www.cypress.com

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MoBL® Clock

M200/M500

Two-PLL Programmable Clock Generator

for Portable Applications

Cypress Semiconductor Corporation

•

198 Champion Court

•

San Jose

, CA 95134-1709

•

408-943-2600

Document Number: 001-29139 Rev. *C

Revised November 25, 2010

Two-PLL Programmable Clock Generator for Portable Applications

Features

■ Device Operating Voltage Options:

❐ MoBL Clock M200 Family: 1.8 V

❐ MoBL Clock M500 Family: 2.5 V, 3.0 V, or 3.3 V

■ Selectable clock output voltages for both MoBL Clock M200

and M500:

❐ 1.5 V, 1.8 V, 2.5 V, 3.0 V, or 3.3 V

■ Fully integrated ultra low power phase-locked loops (PLLs)

■ Input reference clock frequency range: 1–48 MHz

■ Output clock frequency range: 3–50 MHz

■ Three I2C™ programmable output clocks

■ Programmable output drive strengths

■ 150 ps typical cycle-to-cycle jitter

■ Optional Spread Spectrum for EMI reduction

■ 16-pin (3 × 3 × 0.6 mm) QFN Package

■ Industrial temperature range

Benefits

■ Suitable for cell phone, portable, and consumer electronics

applications

■ Multiple high-performance PLLs allow synthesis of unrelated

frequencies

■ Application compatibility in multiple output voltage levels

■ Optional Spread Spectrum capable PLLs with Lexmark or

Linear profile for maximum EMI reduction

■ PLLs can be programmed for system frequency margin tests

■ Meets critical timing requirements in complex system

designs

■ Individually enable or disable each output using I2C

■ Ease of output clock selection using programmable crossbar

switches

Logic Block Diagram

PLL1

PLL2

(SS)

Output

Dividers

and

Drive

Strength

Control

Crossbar

Switch

PD#/OE

CLK1

CLK3

CLK2

VDD_CLK1

VDD_CLK3

VDD_CLK2

REF SEL

MUX

and

Control

Logic

I2C

EXCLKIN

SCL

SDA

[+] Feedback

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