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AFE5808A 数据表(PDF) 8 Page - Texas Instruments |
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AFE5808A 数据表(HTML) 8 Page - Texas Instruments |
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8 / 66 page  AFE5808A SLOS729B – OCTOBER 2011 – REVISED APRIL 2012 www.ti.com ELECTRICAL CHARACTERISTICS (continued) AVDD_5 V = 5 V, AVDD = 3.3 V, AVDD_ADC = 1.8 V, DVDD = 1.8 V, AC-coupled with 0.1 µF at INP and bypassed to ground with 15 nF at INM, No active termination, VCNTL = 0 V, fIN = 5 MHz, LNA = 18 dB, PGA = 24 dB, 14Bit, sample rate = 65 MSPS, LPF Filter = 15 MHz, low noise mode, VOUT = –1 dBFS, internal 500 Ω CW feedback resistor, CMOS CW clocks, ADC configured in internal reference mode, single-ended VCNTL mode, VCNTLM = GND, at ambient temperature TA = 25°C, unless otherwise noted. Min and max values are specified across full-temperature range with AVDD_5 V = 5 V, AVDD = 3.3 V, AVDD_ADC = 1.8 V, DVDD = 1.8 V PARAMETER TEST CONDITION MIN TYP MAX UNITS CW DOPPLER 1 channel mixer, LNA = 24 dB, 500 Ω feedback resistor 0.8 en (RTI) Input voltage noise (CW) nV/rtHz 8 channel mixer, LNA = 24 dB, 62.5 Ω feedback resistor 0.33 1 channel mixer, LNA = 24 dB, 500 Ω feedback resistor 12 en (RTO) Output voltage noise (CW) nV/rtHz 8 channel mixer, LNA = 24 dB, 62.5 Ω feedback resistor 5 1 channel mixer, LNA = 18 dB, 500 Ω feedback resistor 1.1 en (RTI) Input voltage noise (CW) nV/rtHz 8 channel mixer, LNA = 18 dB, 62.5 Ω feedback resistor 0.5 1 channel mixer, LNA = 18 dB, 500 Ω feedback resistor 8.1 en (RTO) Output voltage noise (CW) nV/rtHz 8 channel mixer, LNA = 18 dB, 62.5 Ω feedback resistor 4.0 Rs = 100 Ω,RIN = High Z, fin = 2 MHz (LNA, I/Q mixer and summing NF Noise figure 1.8 dB amplifier/filter) fCW CW Operation Range (2) CW signal carrier frequency 8 MHz 1X CLK (16X mode) 8 CW Clock frequency 16X CLK(16X mode) 128 MHz 4X CLK(4X mode) 32 AC coupled LVDS clock amplitude 0.7 CLKM_16X-CLKP_16X; CLKM_1X-CLKP_1X VPP AC coupled LVPECL clock amplitude 1.6 CLK duty cycle 1X and 16X CLKs 35% 65% Common-mode voltage Internal provided 2.5 V VCMOS CMOS Input clock amplitude 4 5 V CW Mixer conversion loss 4 dB CW Mixer phase noise 1 kHz off 2MHz carrier 156 dBc/Hz DR Input dynamic range FIN = 2MHz, LNA = 24/18/12 dB 160/164/165 dBFS/Hz f1 = 5 MHz, f2 = 5.01 MHz, both tones at -8.5 dBm amplitude, 8 –50 dBc channels summed up in-phase, CW feedback resistor = 87 Ω IMD3 Intermodulation distortion f1 = 5 MHz, F2 = 5.01 MHz, both tones at –8.5 dBm amplitude, Single –60 dBc channel case, CW feed back resistor = 500 Ω I/Q Channel gain matching 16X mode ±0.04 dB I/Q Channel phase matching 16X mode ±0.1 Degree I/Q Channel gain matching 4X mode ±0.04 dB I/Q Channel phase matching 4X mode ±0.1 Degree fin = 2.01 MHz, 300 mV input amplitude, CW clock frequency = 2.00 Image rejection ratio –50 dBc MHz (2) In the 16X operation mode, the CW operation range is limited to 8MHz due to the 16X CLK. The maximum clock frequency for the 16X CLK is 128MHz. In the 8X, 4X, and 1X modes, higher CW signal frequencies up to 15 MHz can be supported with small degradation in performance, see application information: CW clock selection. . 8 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): AFE5808A |
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