AD9645 datasheet(10/36 Pages) AD

10 / 36 page

AD9645

Data Sheet

Rev. 0 | Page 10 of 36

ABSOLUTE MAXIMUM RATINGS

Table 6.

Parameter

Rating

Electrical

AVDD to AGND

−0.3 V to +2.0 V

DRVDD to AGND

−0.3 V to +2.0 V

Digital Outputs to AGND

(D0x±, D1x±, DCO+, DCO−,

FCO+, FCO−)

−0.3 V to +2.0 V

CLK+, CLK− to AGND

−0.3 V to +2.0 V

VINx+, VINx− to AGND

−0.3 V to +2.0 V

SCLK/DFS, SDIO/PDWN, CSB to AGND

−0.3 V to +2.0 V

RBIAS to AGND

−0.3 V to +2.0 V

VREF to AGND

−0.3 V to +2.0 V

VCM to AGND

−0.3 V to +2.0 V

Environmental

Operating Temperature Range (Ambient)

−40°C to +85°C

Maximum Junction Temperature

150°C

Lead Temperature (Soldering, 10 sec)

300°C

Storage Temperature Range (Ambient)

−65°C to +150°C

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

THERMAL RESISTANCE

The exposed paddle is the only ground connection on the chip.

The exposed paddle must be soldered to the AGND plane of the

user’s circuit board. Soldering the exposed paddle to the user’s

board also increases the reliability of the solder joints and

maximizes the thermal capability of the package.

Table 7. Thermal Resistance

Package Type

Airflow

Velocity

(m/sec)

θJA1,2

θJC1,3

θJB1,4

1, 2

Unit

32-Lead LFCSP,

5 mm × 5 mm

37.1

3.1

20.7

0.3

°C/W

1.0

32.4

0.5

°C/W

2.5

29.1

0.8

°C/W

1 Per JEDEC JESD51-7, plus JEDEC JESD51-5 2S2P test board.

2 Per JEDEC JESD51-2 (still air) or JEDEC JESD51-6 (moving air).

3 Per MIL-STD 883, Method 1012.1.

4 Per JEDEC JESD51-8 (still air).

Typical θJA is specified for a 4-layer PCB with a solid ground

plane. As shown in Table 7, airflow improves heat dissipation,

which reduces θJA. In addition, metal in direct contact with the

package leads from metal traces, through holes, ground, and

power planes reduces the θJA.

ESD CAUTION

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