数据搜索系统，热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

预览 PDF HTML

STPMS1 数据表(PDF) 7 Page - STMicroelectronics

部件名 STPMS1
功能描述  Dual-channel 1-bit, 2 MHz, 1st order sigma-delta modulator with embedded PGA
PDF  23 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STPMS1 数据表(HTML) 7 Page - STMicroelectronics

Back Button STPMS1 Datasheet HTML 3Page - STMicroelectronics STPMS1 Datasheet HTML 4Page - STMicroelectronics STPMS1 Datasheet HTML 5Page - STMicroelectronics STPMS1 Datasheet HTML 6Page - STMicroelectronics STPMS1 Datasheet HTML 7Page - STMicroelectronics STPMS1 Datasheet HTML 8Page - STMicroelectronics STPMS1 Datasheet HTML 9Page - STMicroelectronics STPMS1 Datasheet HTML 10Page - STMicroelectronics STPMS1 Datasheet HTML 11Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 23 page
background image
STPMS1
General operating conditions
Doc ID 16524 Rev 2
7/23
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
AC measurement accuracy
SNR
Signal to noise ratio
CIP-CIN channel – Vin=±120 mV @ 55 Hz
Gain 8x
65
dB
VIP-VIN channel – Vin=±230 mV @ 55 Hz
50
SINAD
Signal to noise ratio +
distortion
CIP-CIN channel – Vin=±120 mV @ 55 Hz
Gain 8x
65
dB
VIP-VIN channel – Vin=±230 mV @ 55 Hz
50
THD
Total harmonic distortion
CIP-CIN channel – Vin=±120 mV @ 55 Hz
Gain 8x
-80
dB
VIP-VIN channel – Vin=±230 mV @ 55 Hz
-70
SFDR
Spurious free dynamic
range
CIP-CIN channel – Vin=±120 mV @ 55 Hz
Gain 8x
80
dB
VIP-VIN channel – Vin=±230 mV @ 55 Hz
50
PSRRAC
Power supply AC
rejection
Voltage signal: 200 mVrms/50 Hz
Current signal: 10 mVrms/50 Hz
fCLK= 2.048 MHz
VCC=3.3 V+0.2 Vrms1 @100 Hz
VCC=5.0 V+0.2 Vrms1 @100 Hz
0.1
%
Analog inputs (CIP, CIN, VIP, VIN)
VMAX
Maximum input signal
levels
VIP-VIN channel
-0.3
+0.3
V
CIP-CIN channel
Gain 8X
Gain 32X
-0.15
-0.035
+0.15
+0.035
V
fSPL
A/D sampling frequency
fCLK/2
Hz
Voff
Amplifier offset
±20
mV
ZIP
VIP, VIN impedance
Over the total operating voltage range
200
400
k
Ω
ZIN
CIP, CIN impedance
Over the total operating voltage range
240
k
Ω
GERR
Current channel gain
error
±10
%
IILV
Voltage channel leakage
current
VCC= 5.3 V, fCLK= 1.049 MHz
-1
1
µA
IILI
Current channel leakage
current
-1
1
Input enabled
-10
10
Digital I/O (CLK, DAT, DATn, MS0, MS1)
VIH
Input high voltage
0.75
VCC
5.3
V
VIL
Input low voltage
-0.3
0.25V
CC
V
Table 5.
General operating conditions (continued)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com