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STPMS1 数据表(PDF) 4 Page - STMicroelectronics |
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STPMS1 数据表(HTML) 4 Page - STMicroelectronics |
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4 / 23 page ![]() Pin configuration STPMS1 4/23 Doc ID 16524 Rev 2 2 Pin configuration Figure 2. Pin connection (top view) 1 GND VDDac GND MS0 VDDd VDD MS1 VDDav GND AM07831v1 1 GND VDDac GND MS0 VDDd VDD MS1 VDDav GND AM07831v1 Table 2. Pin description Pin Symbol Description 1 VDD + 3.0 V output of LDO 2 GND Ground level for signals and pin protection 3 VDDac Current channel modulator supply input 4 GND Ground level for signals and pin protection 5 CIP Current channel + 6 CIN Current channel - 7 VIP Voltage channel + 8 VIN Voltage channel - 9 VDDav Voltage channel modulator supply input 10 VDDd Digital front-end supply input 11 MS0 Input for configurator 0 12 MS1 Input for configurator 1 13 CLK Input for external measurement clock 14 DAT Output of multiplexed ΣΔ signal 15 DATn Output of multiplexed ΣΔ signal negated 16 VCC Unregulated supply voltage Exp PAD GND Ground level for signals and pin protection |
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