| 数据搜索系统,热门电子元器件搜索 |
|
STPMS1 数据表(PDF) 16 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STPMS1 数据表(HTML) 16 Page - STMicroelectronics |
|
16 / 23 page ![]() Theory of operation STPMS1 16/23 Doc ID 16524 Rev 2 The band-gap voltage reference is used as the reference level source for the low-drop module and for the AD converters. This module produces several bias currents and voltages for all other analog modules. The low-drop regulator generates the +3.0 V power supply level. This level is used to power the DC buffers, pre-amplifier, and AD converter pair in the analog part of the device and whole digital part. It is brought out as VDD for external connections. As part of low-drop, there is a power on reset (POR) detection circuit, which blocks all functions of the STPMS1 by asserting the reset condition whenever a VCC supply level is less than +2.5 V. In order to enable proper operation of the switched capacitor (SC) section of AD converters, two DC buffers are added to the device. One is buffering the voltage reference level and the other is buffering the level of value equal to (VDD-VSS)/2. The AD converter block is further split into a voltage and current channel. Each channel consists of a differential pre-amplifier, SC integrator, comparator, amplifier bias block, and all necessary switches. The voltage channel SC integrator has a gain of 2 and there is no pre- amplifier block. The current channel SC integrator has a gain of 2 or 8, which can be selected by MS0 input, and has a pre-amplifier with a gain of 4. The amplitude of the input signal to the AD converter block must be kept less than 0.45 Vref. The output of each channel is input to the digital module as ΣΔ stream. For the operation of the analog part, a set of five clock signals is provided from the digital module. These signals derive from the CLK signal. Two of them are used to run the conversion, the next one is used as the chopper signal for the voltage channel and the last two are used as chopper signals for the current channel. All these signals are connected to the control signal module, which consists of standard digital cells powered from an analog supply. It produces all the necessary signals and switch controls of the AD converters. Figure 17. Power supply external connection scheme AM07836v1 VDD GND VDD GND MS0 VDD MS1 VDD GND Analog Supply 3.3 -5.0V 100uF 100nF 100nF AM07836v1 VDD GND VDD GND MS0 VDD MS1 VDD GND Analog Supply 3.3 -5.0V 100uF 100nF 100nF |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |