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WM8501GED/V 数据表(PDF) 4 Page - Wolfson Microelectronics plc |
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WM8501GED/V 数据表(HTML) 4 Page - Wolfson Microelectronics plc |
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4 / 20 page ![]() WM8501 Production Data w PD, Rev 4.2, July 2009 4 PIN DESCRIPTION PIN NAME TYPE DESCRIPTION 1 LRCLK Digital input Sample rate clock input 2 DIN Digital input Serial audio data input 3 BCLK Digital input Bit clock input 4 ENABLE Digital input Enable input – 0 = powered down, 1 = enabled 5 VMID Analogue output Analogue internal reference 6 ROUT Analogue output Right channel DAC output 7 AGND Supply Ground reference for analog circuits and substrate connection 8 AVDD Supply Positive supply for analog circuits 9 LOUT Analogue output Left channel DAC output 10 DGND Digital Supply Digital ground supply 11 DVDD Digital Supply Digital positive supply 12 DEEMPH Digital input De-emphasis select, Internal pull down High = de-emphasis ON Low = de-emphasis OFF 13 FORMAT Digital input Data input format select, Internal pull up Low = 16-bit right justified or DSP (Mode B) High = 16-24-bit I2S or DSP (Mode A) 14 MCLK Digital input Master clock input Note: 1. Digital input pins have Schmitt trigger input buffers. |
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