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WM8501GED/V 数据表(PDF) 8 Page - Wolfson Microelectronics plc |
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WM8501GED/V 数据表(HTML) 8 Page - Wolfson Microelectronics plc |
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8 / 20 page ![]() WM8501 Production Data w PD, Rev 4.2, July 2009 8 Test Conditions VDD = 5V, GND = 0V, TA = +25 oC, fs = 48kHz, MCLK = 256fs unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Audio Data Input Timing Information BCLK cycle time tBCY 40 ns BCLK pulse width high tBCH 16 ns BCLK pulse width low tBCL 16 ns LRCLK set-up time to BCLK rising edge tLRSU 8 ns LRCLK hold time from BCLK rising edge tLRH 8 ns DIN set-up time to BCLK rising edge tDS 8 ns DIN hold time from BCLK rising edge tDH 8 ns |
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