AS-Interface Slave IC

AS2702 (SAP4.1)

Rev. C, January 2001

Page 9 of 18

The dc-parameters of the data port pins D3, …, D0 are specified as follows:

6\PERO

3DUDPHWHU

PLQ

PD[

8QLW

1RWH

IOUTLO

Sink current @ output L

10

mA

VOUT =

1V

IOUTHI

Leakage current @ output off

- 1

1

µA

1

VSCHLT

Input threshold voltage

2.5

3.5

V

2

VIN

Acceptable input voltage @

output off

- 0.3

40

V

Notes:

1

Output stage is low-side open-drain; ext. pull-up resistor required as no pull-up

structure on chip

2

No hysteresis implemented

To govern the data transfer at data port D3, …,D0 strobe pin DSTBn is equipped with a low-

side open-drain output switch plus a passive high-side current source with a nom. 10 µA pull-

up current capability.

However a second function is assigned to the DSTBn pin which requires it to be input as well:

if a low-pulse is imposed on DSTBn by external means with a pulse width of at least 50 to 100

ms, the slave device will be put in RESET condition, as described in section “Reset”.

The dc-and timing parameters of strobe pin DSTBn are specified as follows:

6\PERO

3DUDPHWHU

PLQ

PD[

8QLW

1RWH

IOUTLO

Sink current @ output L

10

mA

VOUT = 1V

IOUTHI

Leakge current @ output off

- 10

10

µA

VOUT = 5V

IINLO

Input current @ VIN = 1V

- 5

- 20

µA

1

VSCHLT

Input threshold voltage

1.5

3.5

V

2

VIN

Acceptable input voltage @

output off

- 0.3

40

V

tNORESET

DSTBn L-phase width, not

triggering RESET

50

ms

tRESET

DSTBn L-phase width, trig-

gering RESET

100

ms

CPINEXT

Stray capacitance

20

pF

Notes:

1

DSTBn is equipped with an on-chip pull-up current source, which ensures

a sufficiently fast LH-edge upon output switch-off in open-pin condition,

to prevent erroneous RESET triggering.

If DSTBn has an external load connected to it,

an additional external pull-up resistor may be needed

to prevent erroneous RESET triggering upon output switch-off

2

No hysteresis implemented