41594B datasheet(17/372 Pages) MICROCHIP

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Preliminary

DS41594B-page 17

PIC12LF1840T48A

3.1.1.2

Indirect Read with FSR

The program memory can be accessed as data by set-

ting bit 7 of the FSRxH register and reading the match-

ing INDFx register. The MOVIW instruction will place the

lower 8 bits of the addressed word in the W register.

Writes to the program memory cannot be performed via

the INDF registers. Instructions that access the pro-

gram memory via the FSR require one extra instruction

cycle to complete. Example 3-2 demonstrates access-

ing the program memory via an FSR.

The HIGH directive will set bit<7> if a label points to a

location in program memory.

EXAMPLE 3-2:

ACCESSING PROGRAM

MEMORY VIA FSR

3.2

Data Memory Organization

The data memory is partitioned in 32 memory banks

with 128 bytes in a bank. Each bank consists of

(Figure 3-2):

• 12 core registers

• 20 Special Function Registers (SFR)

• Up to 80 bytes of General Purpose RAM (GPR)

• 16 bytes of common RAM

The active bank is selected by writing the bank number

into the Bank Select Register (BSR). Unimplemented

memory will read as ‘0’. All data memory can be

accessed either directly (via instructions that use the

file registers) or indirectly via the two File Select

Registers

(FSR).

See

Section 3.5

“Indirect

Addressing” for more information.

3.2.1

CORE REGISTERS

The core registers contain the registers that directly

affect the basic operation of the PIC12LF1840T48A.

These registers are listed below:

• INDF0

• INDF1

•PCL

•STATUS

•FSR0 Low

• FSR0 High

•FSR1 Low

• FSR1 High

• BSR

•WREG

•PCLATH

• INTCON

constants

RETLW DATA0

;Index0 data

RETLW DATA1

;Index1 data

RETLW DATA2

RETLW DATA3

my_function

;… LOTS OF CODE…

MOVLW

LOW constants

MOVWF

FSR1L

MOVLW

HIGH constants

MOVWF

FSR1H

MOVIW 0[FSR1]

;THE PROGRAM MEMORY IS IN W

Note:

The core registers are the first 12

addresses of every data memory bank.

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