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CS1631-FSZ 数据表(PDF) 7 Page - Cirrus Logic |
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CS1631-FSZ 数据表(HTML) 7 Page - Cirrus Logic |
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7 / 56 page ![]() CS1630/31 DS954F2 7 Notes: 1. The CS1630/31 has an internal shunt regulator that limits the voltage on the VDD pin. VZ, the shunt regulation voltage, is defined in the VDD Supply Voltage section on page 6. 2. External circuitry should be designed to ensure that the ZCD current drawn from the internal clamp diode when it is forward biased does not exceed specification. 3. Conductance is the inverse of resistance (1/ ) and is expressed in siemens (S). A decrease in conductance is equivalent to an increase in resistance. 4. Specifications are guaranteed by design and are characterized and correlated using statistical process methods. 5. For test purposes, load capacitance (CL) is 0.25nF and is connected as shown in the following diagram. Second Stage Pulse Width Modulator Minimum Switching Frequency tFB(Min) -625 - Hz Maximum Switching Frequency tFB(Max) -200 - kHz Second Stage Gate Driver Output Source Resistance VDD =12V -24 - Output Sink Resistance VDD =12V -11 - Rise Time (Note 5) CL =0.25nF -- 30 ns Fall Time (Note 5) CL =0.25nF -- 20 ns Second Stage Protection Overcurrent Protection (OCP) VOCP(th) -1.69 - V Overvoltage Protection (OVP) VOVP(th) -1.25 - V Open Loop Protection (OLP) VOLP(th) -200 - mV External Overtemperature Protection (eOTP) Pull-up Current Source – Maximum ICONNECT -80 - A Conductance Accuracy (Note 3) - - ±5 Conductance Offset (Note 3) - ±250 - nS Current Source Voltage Threshold VCONNECT(th) -1.25 - V Internal Overtemperature Protection (iOTP) Thermal Shutdown Threshold (Note 4) TSD -135 - ºC Thermal Shutdown Hysteresis (Note 4) TSD(Hy) -14 - ºC Parameter Condition Symbol Min Typ Max Unit GD OUT GD GND VDD Buffer S1 R1 R2 R3 TP +15V -15V S2 VDD CL 0.25nF |
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