–12–

REV. A

AD7013

IRx

IRx

ADC CODE

10 … 00

00 … 00

01 … 11

Figure 11. ADC Transfer Function for Differential

Operation

IRx

IRx

ADC CODE

10 … 00

00 … 00

01 … 11

SIGMA-DELTA ADC

The AD7013 receive channels employ a sigma-delta conversion

technique, which provides a high resolution 15-bit output for both I

and Q channels with system filtering being implemented on-chip.

The output of the switched-capacitor filter is continuously sampled

at MCLK/8, by a charge-balanced modulator, and is converted

into a digital pulse train whose duty cycle contains the digital

information. Due to the high oversampling rate which spreads the

quantization noise from 0 to f

noise energy which is

contained in the band of interest is reduced (Figure 13a). To

reduce the quantization noise still further, a high order modulator is

employed to shape the noise spectrum, so that most of the noise

energy is shifted out of the band of interest (Figure 13b).

The digital filter that follows the modulator removes the large out

of band quantization noise (Figure 13c), while converting the

digital pulse train into parallel 15-bit wide binary data. The 15-bit

I and Q data plus an I/Q flag bit is made available, via a serial

interface, as a 16-bit word, MSB first.

Figure 12. ADC Transfer Function for Single-Ended

Operation

Digital Filter

The digital filters used in the AD7013 receive section carry out two

important functions. First, they remove the out of band quantiza-

tion noise which is shaped by the analog modulator. Second, they

are also designed to perform system level filtering, providing the

Root-Raised Cosine filter as required for TIA IS-54.

Since digital filtering occurs after the A/D conversion process, it can

remove noise injected during the conversion process. Analog

filtering cannot do this. Also, the digital filter combines low

passband ripple with a steep roll off, while also maintaining a linear

phase response. This is very difficult to achieve with analog filters.

Filter Characteristics

The digital filter is a 256-tap FIR filter, clocked at 1/8 the master

clock frequency. A choice of two frequency responses are available:

a Root-Raised Cosine response (CR11 = 0) and a brick wall

response at 11.4 kHz (CR11 = 1) for analog mode. Figure 16 and

Figure 17 illustrate the respective frequency responses for both

digital mode and analog mode while Figure 18 compares the low

frequency response of the digital filters.

Due to the low-pass nature of the receive filters there is a settling

time associated with step input functions. Output data will not be

meaningful until all the digital filter taps have been loaded with

data samples taken after the step change. Hence, the AD7013

digital filters have a settling time of 256

× 8t

329.2

µs when

MCLK = 6.2208 MHz and 400

µs when MCLK = 5.12 MHz).

388.8kHz

QUANTIZATION NOISE

388.8kHzMHz

BAND OF

INTEREST

NOISE SHAPING

BAND OF

INTEREST

388.8kHz

BAND OF

INTEREST

ROOT RAISED COSINE FIR FILTER

a

b

c

Figure 13. a. Effect of High Oversampling Ratio.

b. Use of Noise Shaping to Further Improve SNR.

c. Use of Digital Filtering to Remove the Out of Band

Quantization Noise

a.

b.

c.