AD775

REV. 0

–9–

POWER SUPPLY CONNECTIONS AND DECOUPLING

The analog and digital supplies of the AD775 have been sepa-

rate to prevent the typically large transients associated with the

on-chip digital circuitry from coupling into the analog supplies

external to the part, preferably a common source somewhere on

the PC board.

Each supply should be decoupled by a 0.1

µF capacitor located

as close to the device pin as possible. Surface-mount capacitors,

by virtue of their low parasitic inductance, are preferable to

through-hole types. A larger capacitor (10

µF electrolytic)

should be located somewhere on the board to help decouple

large, low frequency supply noise. For specific layout informa-

tion, refer to the AD775 Evaluation Board section of the data

sheet.

J6

C15

D

C13

A

J3

TP4

C12

+5V

D

C18

+5VA

J9

J5

C14

J4

TP3

VRB

3

2

1

AD822

C4

390pF

R10

20

1/2 U2

R9

10k

8

C9

A

+5VA

6

AD822

7

C3

390pF

R5

20

1/2 U2

R6

10k

J2

5

4

A

A

R7

10k

A

A

9

3

4

5

1

2

6

7

8

10

G1

A1

A2

A3

A4

A5

A6

A7

A8

GND

74ALS541

12

18

17

16

20

19

15

14

13

11

D

D

C22

+5V

G2

Y1

Y2

Y3

Y4

Y5

Y6

Y7

Y8

TP13

ENABLE

J10

D

D

D

1

40

D

P2-40 PIN IDC

A

R8

10k

D

3

2

U1

GND

AD680

1

A

+5VA

A

C2

R3

499

C1

A

R2

500

R1

500

R11

75

R12

4.99k

3

2

6

AD817

U3

7

C6

A

C8

22

µF

R13

20

Q1

2N3904

TP2

R4

49.9

A

TP1

J1

ANALOG

INPUT

4

C5

A

R14

500

+5VA

R15

499

CR1

1N4148

+5VA

A

C7

10pF

TP5

TP10

R16

49.9

D

TP9

J8

CLOCK

(

)

56

1/6

U7

98

1/6

U7

13

14

17

18

19

15

16

20

21

22

23

24

2

12

11

8

7

6

10

9

5

4

3

1

D2

D3

D4

D0

D1

D5

D6

D7

CLK

OE

AD775

= 47

µF ELECTROLYTIC CAPACITOR

UNLESS OTHERWISE NOTED

= 0.1

µF CERAMIC CAPACITOR

UNLESS OTHERWISE NOTED

NOTES

GND

U4

78M05

J7

C11

D

C21

TP12

TP6

+5V

+5VA

A

C16

C20

C19

TP7

TP8

TP11

1

2

3

4

5

6

U5

U6

Figure 17. AD775 Evaluation Board Schematic

APPLICATIONS

AD775 EVALUATION BOARD

Figures 17 through 22 show the schematic and printed circuit

board (PCB) layout for the AD775 evaluation board. Referring

to Figure 17, the input signal is buffered by U3, an AD817 op

amp configured as a unity-gain follower. The signal is then ac-

coupled and dc-biased by adjusting potentiometer R14. Video

and imaging applications would typically use a dc-restoration

circuit instead of the manual potentiometer adjustment. Q1, an

emitter-follower, buffers the input signal and provides ample

current to drive a simple low-pass filter. The filtering is included

to limit wideband noise and highlight the fact that the AD775

can be driven from a nonzero source impedance.

The reference circuit is similar to the one shown in Figure 11

with the exception that R1 and R2 allow precise adjustment of