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AV775C 数据表(PDF) 10 Page - Analog Devices |
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AV775C 数据表(HTML) 10 Page - Analog Devices |
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10 / 12 page ![]() AD775 REV. 0 –10– Table I. Components List Reference Designator Description Quantity R1, R2, R14 Potentiometer 3 R3, R15 Resistor, 1%, 499 Ω 2 R4, R13, R16 Resistor, 1%, 49.9 Ω 3 R5, R10 Resistor, 1%, 20 Ω 2 R6–R9 Resistor, 1%, 10 k Ω 4 R11 Resistor, 1%, 75 Ω 1 R12 Resistor, 1%, 4.99 k Ω 1 CR1 Diode, 1N4148 1 C1, C2, C5, C6, C9, C12–C15, C18 C20, C22, C23 Ceramic Cap, Z5U, 0.1 µF13 C3, C4 Capacitor, Mica, 390 pF 2 C7 Capacitor, Mica, 10 pF 1 C8 Capacitor, Tantalum, 22 µF, 16 V 1 C11, C16, C19, C21 Capacitor, Alum. Electrolytic, 47 µF, 16 V 4 Q1 Transistor, 2N3904 1 U1 AD680JT 1 U2 AD822AN 1 U3 AD817AN 1 U4 78M05 1 U5 AD775 1 U6 74ALS541N 1 U7 74HC04N 1 J1, J8 BNC Jack 2 VRT and VRB. Note that the VRT and VRB traces (see Figures 19 and 20) are run in parallel and in the same proximity. Any noise coupling is likely to be common mode to both signals and would result in an offset error but not a gain error. The entire reference circuit is powered by a single +5 V supply. The minimum volt- age for VRB is determined by the impedance of the AD822 out- put stage and the amount of current flowing through the internal resistor ladder of the AD775. The sampling clock is buffered by U7, a 74HC04 inverter. It is recommended that the output loading of the inverter is mini- mized in order to maintain fast transition times on the clock. An additional inverter is used to provide a buffered clock signal whose rising edges indicate that data is valid. A 74ALS541 buffers the eight digital data outputs of the AD775 to improve the load driving capability. The multilayer PCB board layout shows some of the important design guidelines recommended for the AD775. The most im- portant aspect is the power and ground distribution. While the AD775 has separate analog and digital power and ground pins, the AD775 should be treated as an entirely analog component. The ground plane is joined close to the ADC in order to main- tain a low potential difference across the analog and digital ground pins. Because the power and grounds are derived from a common point, a slit in the ground plane is used to minimize any interaction between the analog and digital return currents. The power for the AD775, AVDD and DVDD, are derived from the same supply. Separate traces are run to AVDD and DVDD and joined together at the source. While not used on the evalua- tion board, a ferrite bead or inductor can effectively isolate noise generated by digital circuitry such as the output buffers. In cases where only a single supply is available, the inductor should not be placed between AVDD and DVDD. Instead, both supplies of the AD775 should be connected together and isolated from entirely digital components. |
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