AD9042

–20–

REV. A

PRESELECT

FILTER

LNA

5–15MHz

PASSBAND

499

Ω

CMOS

BUFFER

D11

D0

+5V (D)

+5V (A)

AD9042

AIN

ENCODE

ENCODE

M/N PLL

SYNTHESIZER

LO

DRIVE

REF

IN

864MHz

REFERENCE

CLOCK

40.96MHz

12

CHANNELIZER

(REF. FIG 51)

I & Q

DATA

CLK

ADSP-2181

NETWORK

CONTROLLER

INTERFACE

Figure 52. Simplified 5 MHz Wideband “A” Carrier Receiver

System Requirements

Figure 52 shows a typical wideband receiver subsystem based

around the AD9042. This strip consists of a wideband IF filter,

amplifier, ADC, latches, channelizer and interface to a digital

signal processor. This design shows a typical clocking scheme

used in many receiver designs. All timing within the system is

referenced back to a single clock. While this is not necessary, it

does facilitate PLL design, ease of manufacturing, system test,

and calibration. Keeping in mind that the overall performance

goal is to maintain the best possible dynamic range, many

considerations must be made.

One of the biggest challenges is selecting the amplifier used to

drive the AD9042. Since this is a communications application,

the key specification for this amplifier is spurious-free dynamic

range, or SFDR. An amplifier should be selected that can

provide SFDR performance better than 80 dB into 250 ohms.

One such amplifier is the AD9631. These low spurious levels

are necessary as harmonics due to the drive amplifier and ADC

could distort the desired signals of interest.

Two other key considerations for the digital wideband receiver

are converter sample rate and IF frequency range. Since

performance of the AD9042 converter is nearly independent of

both sample rate and analog input frequency (Figures 11, 12,

and 17), the designer has greater flexibility in the selection of

these parameters. Also, since the AD9042 is a bipolar device,

power dissipation is not a function of sample rate. Thus there is

no penalty paid in power by operating at faster sample rates. All

of this is good, because by carefully selecting input frequency

range and sample rate, the drive amplifier and ADC harmonics

can actually be placed out-of-band. Thus other components

such as filters and IF amplifiers may actually end up being the

limiting factor on dynamic range.

For example, if the system has second and third harmonics that

are unacceptably high, by carefully selecting the encode rate and

signal bandwidth, these second and third harmonics can be

placed out-of-band. For the case of an encode rate equal to

40.96 MSPS and a signal bandwidth of 5.12 MHz, placing the

fundamental at 5.12 MHz places the second and third harmon-

ics out of band as shown in the table below.

Table III.

Encode Rate

40.96 MSPS

Fundamental

5.12 MHz–10.24 MHz

Second Harmonic

10.24 MHz–20.48 MHz

Third Harmonic

15.36 MHz–10.24 MHz

Another option can be found through bandpass sampling. If the

analog input signal range is from dc to FS/2, then the amplifier

and filter combination must perform to the specification

required. However, if the signal is placed in the third Nyquist

zone (FS to 3 FS/2), the amplifier is no longer required to meet

the harmonic performance required by the system specifications

since all harmonics would fall outside the passband filter. For

example, the passband filter would range from FS to 3 FS/2.

The second harmonic would span from 2 FS to 3 FS, well

outside the passband filter’s range. The burden then has been

passed off to the filter design provided that the ADC meets the

basic specifications at the frequency of interest. In many

applications, this is a worthwhile tradeoff since many complex

filters can easily be realized using SAW and LCR techniques

alike at these relatively high IF frequencies. Although harmonic

performance of the drive amplifier is relaxed by this technique,

intermodulation performance cannot be sacrificed since

intermods must be assumed to fall in-band for both amplifiers

and converters.

Noise Floor and SNR

Oversampling is the act of sampling at a rate that is greater than

twice the bandwidth of the signal desired. Oversampling does

not have anything to do with the actual frequency of the

sampled signal, it is the bandwidth of the signal that is key.

Bandpass or “IF” sampling refers to sampling a frequency that

is higher than Nyquist and often provides additional benefits

such as down conversion using the ADC and track-and-hold as

a mixer. Oversampling leads to processing gains because the

faster the signal is digitized, the wider the distribution of noise.

Since the integrated noise must remain constant, the actual

noise floor is lowered by 3 dB each time the sample rate is

doubled. The effective noise density for an ADC may be

calculated by the equation:

V

Hz

=

SNR /20

4 FS

For a typical SNR of 68 dB and a sample rate of 40.96 MSPS,

this is equivalent to 31 nV / Hz . This equation shows the

relationship between SNR of the converter and the sample rate

FS. This equation may be used for computational purposes to

determine overall receiver noise.

The signal-to-noise ratio (SNR) for an ADC can be predicted.

When normalized to ADC codes, the following equation

accurately predicts the SNR based on three terms. These are

jitter, average DNL error and thermal noise. Each of these

terms contributes to the noise within the converter.