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AD9283/PCB 数据表(PDF) 2 Page - Analog Devices

部件名 AD9283/PCB
功能描述  8-Bit, 50 MSPS/80 MSPS/100 MSPS 3 V A/D Converter
PDF  12 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD9283/PCB 数据表(HTML) 2 Page - Analog Devices

  AD9283/PCB Datasheet HTML 1Page - Analog Devices AD9283/PCB Datasheet HTML 2Page - Analog Devices AD9283/PCB Datasheet HTML 3Page - Analog Devices AD9283/PCB Datasheet HTML 4Page - Analog Devices AD9283/PCB Datasheet HTML 5Page - Analog Devices AD9283/PCB Datasheet HTML 6Page - Analog Devices AD9283/PCB Datasheet HTML 7Page - Analog Devices AD9283/PCB Datasheet HTML 8Page - Analog Devices AD9283/PCB Datasheet HTML 9Page - Analog Devices Next Button
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–2–
REV. B
AD9283–SPECIFICATIONS (V
DD = 3.0 V, VD = 3.0 V; single-ended input; external reference, unless otherwise noted)
Test
AD9283BRS-100
AD9283BRS-80
AD9283BRS-50
Parameter
Temp
Level
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Units
RESOLUTION
8
8
8
Bits
DC ACCURACY
Differential Nonlinearity
+25
°CI
± 0.5
+1.25
± 0.5
+1.25
± 0.5
+1.25
LSB
Full
VI
+1.50
+1.50
+1.50
LSB
Integral Nonlinearity
+25
°C
I
–1.25
± 0.75 +1.25
–1.25
± 0.75 +1.25
–1.25
± 0.75 +1.25
LSB
Full
VI
+2.25
+1.50
+1.50
LSB
No Missing Codes
Full
VI
Guaranteed
Guaranteed
Guaranteed
Gain Error
1
+25
°CI
–6
± 2.5
+6
–6
± 2.5
+6
–6
± 2.5
+6
% FS
Full
VI
–8
+8
–8
+8
–8
+8
% FS
Gain Tempco
1
Full
VI
80
80
80
ppm/
°C
ANALOG INPUT
Input Voltage Range
(With Respect to AIN)
Full
V
± 512
± 512
± 512
mV p-p
Common-Mode Voltage
Full
V
± 200
± 200
± 200
mV
Input Offset Voltage
+25
°C
I
–35
± 10
35
–35
± 10
35
–35
± 10
35
mV
Full
VI
± 40
± 40
± 40
mV
Reference Voltage
Full
VI
1.2
1.25
1.3
1.2
1.25
1.3
1.2
1.25
1.3
V
Reference Tempco
Full
VI
± 130
± 130
± 130
ppm/
°C
Input Resistance
+25
°C
I
7
10
13
7
10
13
7
10
13
k
Ω
Full
VI
5
16
5
16
5
16
k
Ω
Input Capacitance
+25
°C
V
222
pF
Full
VI
µA
Analog Bandwidth, Full Power
+25
°C
V
475
475
475
MHz
SWITCHING PERFORMANCE
Maximum Conversion Rate
Full
VI
100
80
50
MSPS
Minimum Conversion Rate
+25
°C
IV
111
MSPS
Encode Pulsewidth High (tEH)
+25
°C
IV
4.3
1000
5.0
1000
8.0
1000
ns
Encode Pulsewidth Low (tEL)
+25
°C
IV
4.3
1000
5.0
1000
8.0
1000
ns
Aperture Delay (tA)
+25
°C
V
000
ns
Aperture Uncertainty (Jitter)
+25
°C
V
5
5
5
ps rms
Output Valid Time (tV)
2
Full
VI
2.0
3.0
2.0
3.0
2.0
3.0
ns
Output Propagation Delay (tPD)
2
Full
VI
4.5
7.0
4.5
7.0
4.5
7.0
ns
DIGITAL INPUTS
Logic “1” Voltage
Full
VI
2.0
2.0
2.0
V
Logic “0” Voltage
Full
VI
0.8
0.8
0.8
V
Logic “1” Current
Full
VI
± 1
± 1
± 1
µA
Logic “0” Current
Full
VI
± 1
± 1
± 1
µA
Input Capacitance
+25
°C
V
2.0
2.0
2.0
pF
DIGITAL OUTPUTS
Logic “1” Voltage
Full
VI
2.95
2.95
2.95
V
Logic “0” Voltage
Full
VI
0.05
0.05
0.05
V
Output Coding
Offset Binary Code
Offset Binary Code
Offset Binary Code
POWER SUPPLY
Power Dissipation
3, 4
Full
VI
90
120
90
115
80
100
mW
Power-Down Dissipation
Full
VI
4.2
7
4.2
7
4.2
7
mW
Power Supply Rejection Ratio
(PSRR)
+25
°C
I
18
18
18
mV/V



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