REV. E

AD9432

–6–

Spurious-Free Dynamic Range (SFDR)

The ratio of the rms signal amplitude to the rms value of the

peak spurious spectral component. The peak spurious compo-

nent may or may not be a harmonic. May be reported in dBc

(i.e., degrades as signal level is lowered), or in dBFS (always

related back to converter full scale).

Two-Tone Intermodulation Distortion Rejection

The ratio of the rms value of either input tone to the rms value

of the worst third order intermodulation product; reported in dBc.

AIN

ENCODE

ENCODE

D11–D0

SAMPLE N–1

SAMPLE N

SAMPLE N+10

SAMPLE N+11

SAMPLE N+9

SAMPLE N+1

DATA N–11

DATA N–10

N–9

DATA N–1

DATA N

DATA N + 1

N–2

Figure 1. Timing Diagram

VREFIN

Figure 2. Equivalent Voltage Reference Input Circuit

VREFOUT

Q1

NPN

Figure 3. Equivalent Voltage Reference Output Circuit

Two-Tone SFDR

The ratio of the rms value of either input tone to the rms value

of the peak spurious component. The peak spurious component

may or may not be an IMD product. May be reported in dBc

(i.e., degrades as signal level is lowered), or in dBFS (always

related back to converter full scale).

Worst Harmonic

The ratio of the rms signal amplitude to the rms value of the

worst harmonic component, reported in dBc.

17k

8k

100

100

17k

8k

ENCODE

ENCODE

Figure 4. Equivalent Encode Input Circuit

DIGITAL

OUTPUT

DIGITAL OUTPUT

Figure 5. Equivalent Digital Output Circuit

5k

5k

7k

7k

AIN

AIN

ANALOG INPUT

Figure 6. Equivalent Analog Input Circuit