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ADMC331 数据表(PDF) 4 Page - Analog Devices |
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ADMC331 数据表(HTML) 4 Page - Analog Devices |
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4 / 36 page  ADMC331 –4– REV. B Parameter Min Max Unit Serial Ports Timing Requirements: tSCK SCLK Period 100 ns tSCS DR/TFS/RFS Setup before SCLK Low 15 ns tSCH DR/TFS/RFS Hold after SCLK Low 20 ns tSCP SCLKIN Width 40 ns Switching Characteristics: tCC CLKOUT High to SCLKOUT 0.25 tCK 0.25 tCK + 20 ns tSCDE SCLK High to DT Enable 0 ns tSCDV SCLK High to DT Valid 30 ns tRH TFS/RFSOUT Hold after SCLK High 0 ns tRD TFS/RFSOUT Delay from SCLK High 30 ns tSCDH DT Hold after SCLK High 0 ns tSCDD SCLK High to DT Disable 30 ns tTDE TFS (Alt) to DT Enable 0 ns tTDV TFS (Alt) to DT Valid 25 ns tRDV RFS (Multichannel, Frame Delay Zero) to DT Valid 30 ns tCC tCC tSCH tSCS tRD tRH tSCP tSCP tSCK tSCDV tSCDE tSCDH tSCDD tTDE tTDV tRDV CLKOUT SCLK DR RFSIN TFSIN RFSOUT TFSOUT DT TFS (ALTERNATE FRAME MODE) RFS (MULTICHANNEL MODE, FRAME DELAY 0 [MFD = 0]) Figure 2. Serial Ports |
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