INA231

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SBOS644 – FEBRUARY 2013

REGISTER DETAILS

Configuration Register (00h, Read/Write)

BIT #

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

BIT

RST

—

—

—

AVG2

AVG1

AVG0

MODE3

MODE2

MODE1

NAME

POR

0

1

0

0

0

0

0

1

0

0

1

0

0

1

1

1

VALUE

The Configuration register settings control the operating modes for the INA231. This register controls the

conversion time settings for both the shunt and bus voltage measurements, as well as the averaging mode used.

The operating mode that controls which signals are selected to be measured is also programmed in the

Configuration register.

The Configuration register can be read from at any time without impacting or affecting the device settings or a

conversion in progress. Writing to the Configuration register halts any conversion in progress until the write

sequence is complete, resulting in the start of a new conversion based on the new contents of the Configuration

register. This feature prevents any uncertainty in the conditions used for the next completed conversion.

Bit Descriptions

RST:

Reset Bit

Bit 15

Setting this bit to '1' generates a system reset that is the same as a power-on reset; all registers are reset to default

values. This bit self-clears.

AVG:

Averaging Mode

Bits 9–11

These bits set the number of samples that are collected and averaged together. Table 3 summarizes the AVG bit

settings and related number of averages for each bit.

AVG2

AVG1

AVG0

NUMBER OF

(D11)

(D10)

(D9)

AVERAGES

0

0

0

1

0

0

1

4

0

1

0

16

0

1

1

64

1

0

0

128

1

0

1

256

1

1

0

512

1

1

1

1024

(1)

Shaded values are default.

Copyright © 2013, Texas Instruments Incorporated

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