DAC8222FS datasheet(2/15 Pages) AD

2 / 15 page

REV. C

–2–

DAC8222–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS (@ V

DD = +5 V or +15 V, VREF A = VREF B = +10 V, VOUT A = VOUT B = 0 V; AGND = DGND = 0 V;

TA = Full Temperature Range Specified in Absolute Maximum Ratings; unless otherwise noted. Specifications apply for DAC A and DAC B.)

Parameter

Symbol Conditions

Min

Typ

Max

Units

STATIC ACCURACY

Resolution

Bits

Relative Accuracy

INL

Endpoint Linearity Error

DAC8222A/E/G

±1/2

LSB

DAC8222F/H

±1

LSB

Differential Nonlinearity

DNL

All Grades are Guaranteed Monotonic

±1

LSB

Full-Scale Gain Error

GFSE

DAC8222A/E

±1

LSB

DAC8222G

±2

LSB

DAC8222F/H

±4

LSB

Gain Temperature Coefficient

∆Gain/∆Temperature

TCGFS

(Notes 2, 7)

±2

±5

ppm/

°C

Output Leakage Current

IOUT A (Pin 2),

ILKG

All Digital Inputs =

TA = +25

°C

±5

±10

IOUT B (Pin 24)

0000 0000 0000

TA = Full Temp. Range

±50

Input Resistance

(VREF A, VREF B)RREF

(Note 9)

Ω

Input Resistance Match

∆R

REF

±0.2

±1%

RREF

DIGITAL INPUTS

Digital Input High

VINH

VDD = +5 V

2.4

VDD = +15 V

13.5

Digital Input Low

VINL

VDD = +5 V

0.8

VDD = +15 V

1.5

Input Current

IIN

VIN = 0 V or VDD

TA = +25

°C

±0.001

±1

µA

and VINL or VINH

TA = Full Temp. Range

±10

µA

Input Capacitance

CIN

DB0–DB11

WR, LDAC, DAC A/DAC B

POWER SUPPLY

Supply Current

IDD

All Digital Inputs VINL or VINH

2mA

All Digital Inputs 0 V or VDD

100

µA

DC Power Supply

Rejection Ratio

PSRR

∆V

DD =

±5%

0.002

%/%

(

∆Gain/∆V

DD)

AC PERFORMANCE CHARACTERISTICS

Propagation Delay

4, 5

tPD

TA = +25

°C

350

Current Settling Time

5, 6

TA = +25

°C1

µs

Output Capacitance

Digital Inputs = All 0s

COUT A, COUT B

Digital Inputs = All 1s

120

COUT A, COUT B

120

AC Feedthrough at

FTA

VREF A to IOUT A; VREF A = 20 V p-p;

–70

IOUT A or IOUT B

f = 100 kHz; TA = +25

°C

–70

VREF B to IOUT B; VREF B = 20 V p-p;

–70

FTB

f = 100 kHz; TA = +25

°C

–70

SWITCHING CHARACTERISTICS

2, 3

VDD = +5 V

VDD = +15 V

+25

°C–40°C to +85°C8 –55°C to +125°C

All Temps

DAC Select to

tAS

150

180

210

ns min

Write Set-Up Time

DAC Select to

tAH

ns min

Write Hold Time

LDAC to

tLS

100

120

ns min

Write Set-Up Time

LDAC to

tLH

ns min

Write Hold Time

Data Valid to

tDS

220

240

260

100

ns min

Write Set-Up Time

Data Valid to

tDH

ns min

Write Hold Time

Write Pulse Width

tWR

130

160

170

ns min

LDAC Pulse Width

tLWD

100

120

130

ns min

NOTES

11Measured using internal R

FB A and RFB B. Both DAC digital inputs = 1111 1111 1111.

12Guaranteed and not tested.

13See timing diagram.

14From 50% of digital input to 90% of final analog output current.

VREF A = VREF B = +10 V; OUT A, OUT B load = 100

Ω, C

EXT = 13 pF.

WR, LDAC = 0 V; DB0–DB11 = 0 V to V

DD or VDD to 0 V.

16Settling time is measured from 50% of the digital input change to where the

output voltage settles within 1/2 LSB of full scale.

17Gain TC is measured from +25

°C to T

MIN or from +25

°C to T

MAX.

18 These limits apply for the commercial and industrial grade products.

19 Absolute temperature coefficient is approximately +50 ppm/

°C.

10 These limits also apply as typical values for V

DD = +12 V with +5 V CMOS

logic levels and TA = +25

°C.

Specifications subject to change without notice.

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