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SSM2275 数据表(PDF) 11 Page - Analog Devices |
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SSM2275 数据表(HTML) 11 Page - Analog Devices |
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11 / 16 page ![]() SSM2275/SSM2475 REV. A –11– FREQUENCY – kHz –100 –130 –160 022 10 20 –110 –120 –140 –150 VSY = 5V AV = 1 RL = 100k VIN = 0dBV FREQUENCY – kHz –100 –130 –160 022 10 20 –110 –120 –140 –150 VSY = 5V AV = –1 RL = 100k VIN = 0dBV Figure 31. Spectral Graph of Amplifier Outputs Settling Time The high slew rate and wide gain-bandwidth product of the SSM2275 and SSM2475 amplifiers result in fast settling times (tS < 1 µs) that are suitable for 16- and 20-bit applications. The test circuit used to measure the settling time of the SSM2275/ SSM2475 is shown in Figure 32. This test method has advan- tages over false-sum node techniques of measuring settling times in that the actual output of the amplifier is measured, instead of an error voltage at the sum node. Common-mode settling ef- fects are also taken into account in this circuit in addition to slew rate and bandwidth factors. The output waveform of the device under test is clamped by Schottky diodes and buffered by the JFET source follower. The signal is amplified by a factor of ten by the OP260 current feed- back amplifier and then Schottky-clamped at the output to the oscilloscope. The 2N2222 transistor sets up the bias current for the JFET and the OP41 is configured as a fast integrator, pro- viding overall dc offset nulling at the output. SETTLING TIME – ns 10 6 –10 400 600 800 1000 1200 2 –2 –6 8 4 0 –4 –8 –0.01% 0.1% 0.01% Figure 33. Settling Time vs. Step Size Overdrive Recovery The overdrive, or overload, recovery time of an amplifier is the time required for the output voltage to return to a rated output voltage from a saturated condition. This recovery time can be important in applications where the amplifier must recover quickly after a large transient event, or overload. The circuit in Figure 34 was used to evaluate the recovery time for the SSM2275/SSM2475. Also shown are the input and output voltages. It takes approximately 0.5 µs for the device to recover from output overload. R1 1k RS 909 RF 10k +5V –5V RL 10k VOUT VIN 2V p-p 10kHz Figure 34. Overload Recovery Time Test Circuit 9V–15V 0.1 F V+ 5V RL 1k D1 D2 +15V 2N4416 1k D3 D4 OUTPUT (TO SCOPE) 1 F 10k IC2 RF 2k 750 2N2222A 15k –15V 1N4148 DUT 1/2 OP260AJ 9V–15V 0.1 F 10k –+ + – SCHOTTKY DIODES D1–D4 ARE HEWLETT-PACKARD HP5082-2835 IC1 IS 1/2 OP260AJ IC2 IS PMI OP41EJ V– RG 222 Figure 32. Settling Time Test Fixture |
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