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SSM2275 数据表(PDF) 14 Page - Analog Devices |
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SSM2275 数据表(HTML) 14 Page - Analog Devices |
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14 / 16 page ![]() SSM2275/SSM2475 REV. A –14– SPICE Macro-model The SPICE macro-model for the SSM2275 is shown in Listing 1 on the following page. This model is based on typical values for the device and can be downloaded from Analog Devices’ Internet site at www.analog.com. The model uses a common emitter output stage to provide rail-to-rail performance. A resis- tor and dc voltage source, in series with the collector, accurately portray output dropout voltage versus output current. The VCMH and VCML sources set the upper and lower limits of the input common mode voltage range. Both are set up as a function of the supply voltage to mimic the varying common mode range with supply voltage. The EOS voltage source estab- lishes the offset voltage and is also used to create the common- mode rejection and power supply rejection characteristics for the model. A secondary pole section is also set up to vary the gain band- width product and phase margin of the model based on the supply voltage. The H1 and VR1 sources set up an equivalent resistor that is linearly varied with supply voltage. This equiva- lent resistance, in parallel with C2, creates the secondary pole. G2 is also linearly varied to increase the GBW at higher supply voltages. With a supply voltage of 5 V, the gain bandwidth product is 6.3 MHz with a 47 degree phase margin. At a 30 V supply voltage, the GBW product moves out to 7.5 MHz with 48 ° phase margin. The broadband input referred voltage noise for the model is 6.8 nV/ √Hz. Flicker noise characteristics are also accurately modeled with the 1/f corner frequency set through the KF and AF terms in the input stage transistors. Finally, a voltage-con- trolled current source, GSY, is used to model the amplifier’s supply current versus supply voltage characteristics. 6 7 5 100pF 330pF 16 15 14 13 12 11 10 9 18-BIT DAC 18-BIT SERIAL REG. VOL AGND 18-BIT SERIAL REG. 18-BIT DAC VOR VBL DGND VBR LR DR LL DL CK V L 1 2 3 4 5 6 7 8 AD1868 220 F 47k RIGHT CHANNEL OUTPUT 330pF 100pF 220 F LEFT CHANNEL OUTPUT +5V SUPPLY 1 3 2 4 8 1/2 SSM2275 1/2 SSM2275 47k Ω 7.68k 7.68k 7.68k 7.68k 9.76k 9.76k V REF V REF V S Figure 42. A Smoothing Filter for an 18-Bit Stereo DAC |
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