SSM2275/SSM2475

REV. A

–12–

Capacitive Loading

The output of the SSM2275/SSM2475 can tolerate a degree of

capacitive loading. However, under certain conditions, a heavy

capacitive load could create excess phase shift at the output and

put the device into oscillation. The degree of capacitive loading

is dependent on the gain of the amplifier. At unity gain, the am-

plifier could become unstable at loads greater than 600 pF. At

gain greater than unity, the amplifier can handle a higher degree

of capacitive load without oscillating. Figure 35 shows how to

configure the device to prevent oscillations from occurring.

SSM2275

50k

INVERTING GAIN AMPLIFIER

SSM2275

50k

NONINVERTING GAIN AMPLIFIER

Figure 35. Configurations for Driving Heavy Capacitive

Loads

Ω. To minimize offset voltage, the

eliminate any oscillation problems from any sized capacitive

load. The low-pass frequency is determined by:

f

RC

dB

FB

F

−

=

3

1

2

π

(6)

Ω and C

with a 210 kHz bandwidth that can be used with any capacitive

load. If the amplifier is being used in a noninverting unity gain

Ω, the in-

crease in offset voltage would be 10 mV. This configuration will

stabilize the amplifier under all capacitive loads.

Single Supply Differential Line Driver

Figure 36 shows a single supply differential line driver circuit

that can drive a 600

Ω load with less than 0.001% distortion.

The design mimics the performance of a fully balanced trans-

former based solution. However, this design occupies much less

board space while maintaining low distortion and can operate

down to dc. Like the transformer based design, either output

can be shorted to ground for unbalanced line driver applications

without changing the circuit gain of 1.

R13 and R14 set up the common-mode output voltage equal to

half of the supply voltage. C1 is used to couple the input signal

and can be omitted if the input’s dc voltage is equal to half of

the supply voltage. The minimum input impedance of the cir-

RR

R

R

R

R

()

15

3

7

11

||

||

(7)

Ω. With C1 omitted

the circuit will provide a balanced output down to dc, otherwise

the –3 dB corner for the input frequency is set by:

f

RC

dB

IN

L

−

=

3

1

2

π

(8)

The circuit can also be configured to provide additional gain if

desired. The gain of the circuit is:

=

=

2(R2)

R1

(9)

R2 = R4 = R6 = R8

Figure 37 shows the THD+N versus frequency response of the

circuit while driving a 600

Ω load at 1 V rms.

SSM2475-A

+12V

R2

10k

R1

10k

C3

33pF

R9

50

R5

10k

SSM2475-B

+12V

R8

10k

R7

10k

C4

33pF

R10

50

R3

10k

SSM2475-C

+5V

R4

10k

C4

10 F

R12

10k

R11

10k

R13

100k

C1*

10 F

R14

100k

C2

10 F

+12V

R6

10k

C3

10 F

C1* IS OPTIONAL

Figure 36. A Low Noise, Single Supply Differential

Line Driver

FREQUENCY – Hz

0.1

0.01

0.0001

20

20k

100

1k

0.001

10k

Figure 37. THD+N vs. Frequency of Differential Line Driver