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ADL5906ACPZN-R2 数据表(PDF) 28 Page - Analog Devices |
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ADL5906ACPZN-R2 数据表(HTML) 28 Page - Analog Devices |
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28 / 32 page ![]() ADL5906 Data Sheet Rev. 0 | Page 28 of 32 EVALUATION BOARD The ADL5906-EVALZ is a fully populated, 4-layer, FR4- based evaluation board. For normal operation, it requires a 5 V/100 mA power supply. The 5 V power supply must be connected to the VPOS and GND test loops. The RF input signal is applied to the SMA connector (RFIN). The output voltage is available on the SMA connector (VOUT1) or on the test loop (VOUT). Configuration options for the evaluation board are listed in Table 8. X2 BIAS AND POWER DOWN CONTROL 1 NIC ITGT LINEAR-IN-dB VGA (NEGATIVE SLOPE) IDET 26pF 2 VPOS1 VPOS2 3 GND1 VREF VTGT GND2 4 11 10 9 5 CRMS C9 0.1µF 6 VRMS 7 VSET 8 16 15 14 13 VTEMP NIC RFIN– RFIN+ NIC EPAD ADL5906 12 X2 VREF 2.3V TEMPERATURE SENSOR G = 5 R3 60.4Ω C10 10nF RFIN TC2 VOUT VOUT1 VREF VTGT GND C12 10nF R12 270Ω R9 1.5kΩ R11 2kΩ R10 3.74kΩ R6 0Ω R1 0Ω R2 (OPEN) R15 (OPEN) VSET VPOS C3 0.1µF C4 100pF C7 0.1µF C5 100pF TADJ/ PWDN Figure 63. Evaluation Board Schematic Table 8. Evaluation Board Configuration Options Component Function/Notes Default Value RFIN, R3, C10, C12 RF input. The evaluation board is configured for single-ended drive on the RFIN+ pin (Pin 14). Capacitors C10 and C12 have been set large enough so that the full frequency range of the device is covered. If operation down to 10 MHz is not required, the value of these capacitors can be reduced. RFIN = SMA connector, C10 = C12 = 10 nF, R3 = 60.4 Ω VTGT, R10, R11 VTGT interface. R10 and R11 are set up to provide 0.8 V to VTGT derived from VREF. If R10 and R11 are removed, an external voltage can be applied on the VTGT test point. VTGT = black test loop, R10 = 3.74 kΩ, R11 = 2 kΩ, VTGT = 0.8 V VPOS, GND, C3, C4, C5,C7 Power supply interface and decoupling. Apply the power supply for the evaluation board to the VPOS and GND test loops. The nominal supply decoupling consists of a 100 pF capacitor and a 0.1 µF capacitor on each power supply pin, with the 100pF capacitor placed closer to the pin. VPOS = red test loop, GND = black test loop, C3 = C7 = 0.1 µF, C4 = C5 = 100 pF |
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