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PCAL9554B 数据表(PDF) 39 Page - NXP Semiconductors

部件名 PCAL9554B
功能描述  Low-voltage 8-bit I2C-bus and SMBus low power I/O port with interrupt, weak pull-up and Agile I/O
PDF  42 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

PCAL9554B 数据表(HTML) 39 Page - NXP Semiconductors

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PCAL9554B_PCAL9554C
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 10 December 2012
39 of 42
NXP Semiconductors
PCAL9554B; PCAL9554C
Low-voltage 8-bit I2C-bus/SMBus low power I/O port
19. Abbreviations
20. Revision history
Table 27.
Abbreviations
Acronym
Description
ACPI
Advanced Configuration and Power Interface
CBT
Cross-Bar Technology
CDM
Charged-Device Model
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
FET
Field-Effect Transistor
FF
Flip-Flop
GPIO
General Purpose Input/Output
HBM
Human Body Model
I2C-bus
Inter-Integrated Circuit bus
I/O
Input/Output
LED
Light Emitting Diode
LP
Low-Pass
LSB
Least Significant Bit
MSB
Most Significant Bit
POR
Power-On Reset
SCR
Silicon Controlled Rectifier
SMBus
System Management Bus
Table 28.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PCAL9554B_PCAL9554C v.2
20121210
Product data sheet
-
PCAL9554B_PCAL9554C v.1
Modifications:
• Section 8.5 “Device current consumption with internal pull-up and pull-down resistors”,
second paragraph: first sentence is corrected from “The pull-up or pull-down function
is selected in registers 48h and 49h, while the resistor is connected by the enable
registers 46h and 47h.” to “The pull-up or pull-down function is selected in register
44h, while the resistor is connected by the enable register 43h.”
• Table 22 “Static characteristics”: Conditions updated for characteristic Cio:
added “SDA, SCL” to first condition row; added “P port” to second condition row
PCAL9554B_PCAL9554C v.1
20121003
Product data sheet
-
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