INTEDG datasheet(58/478 Pages) MICROCHIP

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PIC16(L)F1946/1947

DS41414D-page 58

 2010-2012 Microchip Technology Inc.

CONFIG2: CONFIGURATION WORD 2

R/P-1

U-1

R/P-1

LVP(1)

DEBUG(2)

—BORV(3)

STVREN

PLLEN

bit 13

bit 8

U-1

R/P-1/1

U-1

R/P-1

—

VCAPEN

—

—WRT<1:0>

bit 7

bit 0

Legend:

R = Readable bit

P = Programmable bit

U = Unimplemented bit, read as ‘1’

‘0’ = Bit is cleared

‘1’ = Bit is set

-n = Value when blank or after Bulk Erase

bit 13

LVP: Low-Voltage Programming Enable bit(1)

1 = Low-voltage programming enabled

0 = High-voltage on MCLR must be used for programming

bit 12

DEBUG: In-Circuit Debugger Mode bit(2)

1 = In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins

0 = In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger

bit 11

Unimplemented: Read as ‘1’

bit 10

BORV: Brown-out Reset Voltage Selection bit(3)

1 = Brown-out Reset voltage (Vbor), low trip point selected.

0 = Brown-out Reset voltage (Vbor), high trip point selected.

bit 9

STVREN: Stack Overflow/Underflow Reset Enable bit

1 = Stack Overflow or Underflow will cause a Reset

0 = Stack Overflow or Underflow will not cause a Reset

bit 8

PLLEN: PLL Enable bit

1 = 4xPLL enabled

0 = 4xPLL disabled

bit 7-5

Unimplemented: Read as ‘1’

bit 4

VCAPEN: Voltage Regulator Capacitor Enable bits

0 =VCAP functionality is enabled on RF0

1 = No capacitor on VCAP pin

bit 3-2

Unimplemented: Read as ‘1’

bit 1-0

WRT<1:0>: Flash Memory Self-Write Protection bits

8 kW Flash memory (PIC16(L)F1946):

11 = Write protection off

10 = 000h to 1FFh write-protected, 200h to 1FFFh may be modified by EECON control

01 = 000h to FFFh write-protected, 1000h to 1FFFh may be modified by EECON control

00 = 000h to 1FFFh write-protected, no addresses may be modified by EECON control

16 kW Flash memory (PIC16(L)F1947):

11 = Write protection off

10 = 000h to 1FFh write-protected, 200h to 3FFFh may be modified by EECON control

01 = 000h to 1FFFh write-protected, 2000h to 3FFFh may be modified by EECON control

00 = 000h to 3FFFh write-protected, no addresses may be modified by EECON control

Note 1:

The LVP bit cannot be programmed to ‘0’ when Programming mode is entered via LVP.

The DEBUG bit in Configuration Words is managed automatically by device development tools including

debuggers and programmers. For normal device operation, this bit should be maintained as a ‘1’.

See Vbor parameter for specific trip point voltages.

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