24AA02UID datasheet(8/30 Pages) MICROCHIP

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24AA02UID/24AA025UID

DS20005202A-page 8

 2013 Microchip Technology Inc.

5.0

DEVICE ADDRESSING

A control byte is the first byte received following the

Start condition from the master device. The control byte

consists of a 4-bit control code. For the 24AA02XUID,

this is set as ‘

1010’ binary for read and write

operations. For the 24AA02UID the next three bits of

the control byte are “don’t cares”.

For the 24AA025UID, the next three bits of the control

byte are the Chip Select bits (A2, A1, A0). The Chip

Select bits allow the use of up to eight 24AA025UID

devices on the same bus and are used to select which

device is accessed. The Chip Select bits in the control

byte must correspond to the logic levels on the corre-

sponding A2, A1 and A0 pins for the device to respond.

These bits are in effect the three Most Significant bits of

the word address.

For the 6-pin SOT-23 package, the A2 address pin is

not available. During device addressing, the A2 Chip

Select bit should be set to ‘0’.

The last bit of the control byte defines the operation to

be performed. When set to ‘

1’, a read operation is

selected. When set to ‘

0’, a write operation is selected.

Following the Start condition, the 24AA02XUID moni-

tors the SDA bus, checking the device type identifier

being transmitted and, upon a

‘1010’ code, the slave

device outputs an Acknowledge signal on the SDA line.

Depending on the state of the R/W bit, the

24AA02XUID will select a read or write operation.

FIGURE 5-1:

CONTROL BYTE

ALLOCATION

5.1

Contiguous Addressing Across

Multiple Devices

The Chip Select bits A2, A1 and A0 can be used to

expand the contiguous address space for up to 16K bits

by adding up to eight 24AA025UID devices on the

same bus. In this case, software can use A0 of the con-

trol byte as address bit A8, A1 as address bit A9 and

A2 as address bit A10. It is not possible to sequentially

read across device boundaries.

For the SOT-23 package, up to four 24AA025UID

devices can be added for up to 8K bits of address

space. In this case, software can use A0 of the control

byte as address bit A8, and A1 as address bit A9. It is

not possible to sequentially read across device

boundaries.

FIGURE 5-2:

ADDRESS SEQUENCE BIT ASSIGNMENTS

Operation

Control

Code

Chip Select

R/W

Read

1010

Chip Address

Write

1010

Chip Address

A2* A1* A0* R/W ACK

Start Bit

Read/Write Bit

Slave Address

Acknowledge Bit

Control Code

Chip

Select

Bits

Note:

* Bits A0, A1 and A2 are “don’t cares” for

the 24AA02UID.

010

R/W

••

•

Control Byte

Address Low Byte

Control

Code

Chip

Select

bits

Note:

* Bits A0, A1 and A2 are “don’t cares” for the 24AA02UID.

A2* A1* A0*

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