AD7680BRJZ-R2 datasheet(16/24 Pages) AD

16 / 24 page

AD7680

Rev. A | Page 16 of 24

POWER VS. THROUGHPUT RATE

By using the power-down mode on the AD7680 when not

converting, the average power consumption of the ADC

decreases at lower throughput rates. Figure 19 shows how as the

throughput rate is reduced, the part remains in its shut-down

state longer, and the average power consumption over time

drops accordingly.

For example, if the AD7680 is operated in a continuous

sampling mode, with a throughput rate of 10 kSPS and an SCLK

of 2.5 MHz (VDD = 3.6 V), and the device is placed in power-

down mode between conversions, the power consumption is

calculated as follows. The maximum power dissipation during

normal operation is 6.84 mW (VDD = 3.6 V). If the power-up

time from power-down is 1 μs, and the remaining conversion

time is 8 μs, (using a 20 SCLK transfer), then the AD7680 can

be said to dissipate 6.84 mW for 9 μs during each conversion

cycle. With a throughput rate of 10 kSPS, the cycle time is 100

μs.

For the remainder of the conversion cycle, 91 μs, the part

remains in power-down mode. The AD7680 can be said to

dissipate 1.08 μW for the remaining 91 μs of the conversion

cycle. Therefore, with a throughput rate of 10 kSPS, the average

power dissipated during each cycle is

(9/100) × (6.84 mW) + (91/100) × (1.08 μW) = 0.62 mW

Figure 19 shows the power dissipation versus the throughput

rate when using the power-down mode with 3.6 V supplies, a

2.5 MHz SCLK, and a 20 SCLK serial transfer.

0.01

THROUGHPUT (kSPS)

0.1

VDD = 3.6V

FSCLK = 2.5MHz

Figure 19. Power vs. Throughput Using

Power-Down Mode with 20 SCLK Transfer at 3.6 V

AD7680BRJZ-R2 数据表(PDF) 16 Page - Analog Devices

AD7680BRJZ-R2 数据表(HTML) 16 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

数据表下载