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PIC18F87J11 数据表(PDF) 27 Page - Microchip Technology |
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PIC18F87J11 数据表(HTML) 27 Page - Microchip Technology |
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27 / 466 page  2007-2012 Microchip Technology Inc. DS39778E-page 27 PIC18F87J11 FAMILY PORTG is a bidirectional I/O port. RG0/PMA8/ECCP3/P3A RG0 PMA8 ECCP3 P3A 5 I/O O I/O O ST — ST — Digital I/O. Parallel Master Port address. Capture 3 input/Compare 3 output/PWM3 output. ECCP3 PWM Output A. RG1/PMA7/TX2/CK2 RG1 PMA7 TX2 CK2 6 I/O O O I/O ST — — ST Digital I/O. Parallel Master Port address. EUSART2 asynchronous transmit. EUSART2 synchronous clock (see related RX2/DT2). RG2/PMA6/RX2/DT2 RG2 PMA6 RX2 DT2 7 I/O I/O I I/O ST — ST ST Digital I/O. Parallel Master Port address. EUSART2 asynchronous receive. EUSART2 synchronous data (see related TX2/CK2). RG3/PMCS1/CCP4/P3D RG3 PMCS1 CCP4 P3D 8 I/O I/O I/O O ST — ST — Digital I/O. Parallel Master Port Chip Select 1. Capture 4 input/Compare 4 output/PWM4 output. ECCP3 PWM Output D. RG4/PMCS2/CCP5/P1D RG4 PMCS2 CCP5 P1D 10 I/O O I/O O ST — ST — Digital I/O. Parallel Master Port Chip Select 2. Capture 5 input/Compare 5 output/PWM5 output. ECCP1 PWM Output D. TABLE 1-4: PIC18F8XJ1X PINOUT I/O DESCRIPTIONS (CONTINUED) Pin Name Pin Number Pin Type Buffer Type Description 80-TQFP Legend: TTL = TTL compatible input CMOS = CMOS compatible input or output ST = Schmitt Trigger input with CMOS levels Analog = Analog input I = Input O = Output P = Power OD = Open-Drain (no P diode to VDD) I2C = ST with I2C™ or SMB levels Note 1: Alternate assignment for ECCP2/P2A when Configuration bit, CCP2MX, is cleared (Extended Microcontroller mode). 2: Default assignment for ECCP2/P2A for all devices in all operating modes (CCP2MX is set). 3: Default assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is set). 4: Alternate assignment for ECCP2/P2A when CCP2MX is cleared (Microcontroller mode). 5: Alternate assignments for P1B/P1C/P3B/P3C (ECCPMX Configuration bit is cleared). 6: Default assignment for PMP data and control pins when PMPMX Configuration bit is set. 7: Alternate assignment for PMP data and control pins when PMPMX Configuration bit is cleared (programmed). |
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