DAC8043

Rev. E | Page 6 of 16

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

GND

4

8

CLK

7

SRI

6

LD

5

DAC8043

TOP VIEW

(Not to Scale)

Figure 2. 8-Lead PDIP

DAC8043

TOP VIEW

(Not to Scale)

NC

1

NC

2

NC

16

NC

15

14

CLK

13

SRI

12

GND

6

LD

11

GND

7

NC

10

NC

8

NC

9

NC = NO CONNECT. DO NOT

CONNECT TO THIS PIN.

Figure 3. 16-Lead Wide-Body SOIC

Table 5. Pin Function Descriptions

Pin No.

8-Lead PDIP

16-Lead SOIC

Mnemonic

Description

1

3

V

REF

DAC Reference Voltage Input Pin.

2

4

R

FB

DAC Feedback Resistor Pin. This pin establishes voltage output for the DAC by

connecting to an external amplifier output.

3

5

I

OUT

DAC Current Output.

4

6, 7

GND

Ground Pin.

5

11

LD

Load Strobe, Level-Sensitive Digital Input. Transfers shift-register data to DAC register

while active low.

6

12

SRI

12-Bit Serial Register Input. Data loads directly into the shift register MSB first. Extra

leading bits are ignored.

7

13

CLK

Serial Clock Input. Positive-edge clocks data into shift register.

8

14

V

DD

Positive Power Supply Input.

1, 2, 8, 9, 10, 15, 16

NC

Do Not Connect to These Pins.