AOZ8000CIL datasheet(3/15 Pages) AOSMD

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AOZ8000

Rev. 2.4 July 2010

www.aosmd.com

Page 3 of 15

Electrical Characteristics

Notes:

3. These specifications are guaranteed by design.

4. The working peak reverse voltage, VRWM, should be equal to or greater than the DC or continuous peak operating voltage level.

5. VBR is measured at the pulse test current IT.

6. Measurements performed with no external capacitor on VP (pin 5 floating).

7. Measurements performed with VP biased to 3.3 Volts (pin 5 @ 3.3V).

8. Measurements performed using a 100ns Transmission Line Pulse (TLP) system.

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Units

VRWM

Reverse Working Voltage

Between pin 5 and 2(4)

5.5

VBR

Reverse Breakdown Voltage

IT = 1mA, between pins 5 and 2(5)

6.6

Reverse Leakage Current

VRWM = 5V, between pins 5 and 2

0.1

µA

Diode Forward Voltage

IF = 15mA

0.70

0.85

VCL

Channel Clamp Voltage

Positive Transients

Negative Transient

IPP = 1A, tp = 100ns, any I/O pin to

Ground(3)(6)(8)

10.0

-3.0

Channel Clamp Voltage

Positive Transients

Negative Transient

IPP = 5A, tp = 100ns, any I/O pin to

Ground(3)(6)(8)

-6.0

Channel Clamp Voltage

Positive Transients

Negative Transient

IPP = 12A, tp = 100ns, any I/O pin to

Ground(3)(6)(8)

15.0

-10.0

Junction Capacitance

VR = 0V, f = 1MHz, any I/O pin to Ground(3)(6)

1.85

1.94

VR = 0V, f = 1MHz, between I/O pins(3)(6)

0.9

0.94

VR = 0V, f = 1MHz, any I/O pin to Ground(3)(7)

1.0

1.17

ΔCj

Channel Input Capacitance

Matching

VR = 0V, f = 1MHz, between I/O pins(3)(6)

0.03

AOZ8000CIL 数据表(PDF) 3 Page - Alpha & Omega Semiconductors

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