M68ICS08GR datasheet(65/408 Pages) FREESCALE

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Resets and Interrupts

Resets

MC68HC908GR8 — Rev 4.0

Technical Data

MOTOROLA

Resets and Interrupts

4.3.4 SIM Reset Status Register

This read-only register contains flags to show reset sources. All flag bits

are automatically cleared following a read of the register. Reset service

can read the SIM reset status register to clear the register after power-

on reset and to determine the source of any subsequent reset.

The register is initialized on powerup as shown with the POR bit set and

all other bits cleared. During a POR or any other internal reset, the RST

pin is pulled low. After the pin is released, it will be sampled 32 XCLK

cycles later. If the pin is not above a V

IH at that time, then the PIN bit in

the SRSR may be set in addition to whatever other bits are set.

NOTE:

Only a read of the SIM reset status register clears all reset flags. After

multiple resets from different sources without reading the register,

multiple flags remain set.

POR — Power-On Reset Flag

1 = Power-on reset since last read of SRSR

0 = Read of SRSR since last power-on reset

PIN — External Reset Flag

1 = External reset via RST pin since last read of SRSR

0 = POR or read of SRSR since last external reset

COP — Computer Operating Properly Reset Bit

1 = Last reset caused by timeout of COP counter

0 = POR or read of SRSR

Address:

$FE01

Bit 7

654321

Bit 0

Read:

POR

COP

ILOP

ILAD

LVI

Write:

POR:

10000000

= Unimplemented

Figure 4-3. SIM Reset Status Register (SRSR)

Freescale Semiconductor, Inc.

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