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M68ICS08GR 数据表(PDF) 102 Page - Freescale Semiconductor, Inc |
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M68ICS08GR 数据表(HTML) 102 Page - Freescale Semiconductor, Inc |
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102 / 408 page ![]() Clock Generator Module (CGMC) Technical Data MC68HC908GR8 — Rev 4.0 102 Clock Generator Module (CGMC) MOTOROLA 7.4.1 Crystal Oscillator Circuit The crystal oscillator circuit consists of an inverting amplifier and an external crystal. The OSC1 pin is the input to the amplifier and the OSC2 pin is the output. The SIMOSCEN signal from the system integration module (SIM) or the OSCSTOPENB bit in the CONFIG register enable the crystal oscillator circuit. The CGMXCLK signal is the output of the crystal oscillator circuit and runs at a rate equal to the crystal frequency. CGMXCLK is then buffered to produce CGMRCLK, the PLL reference clock. CGMXCLK can be used by other modules which require precise timing for operation. The duty cycle of CGMXCLK is not guaranteed to be 50% and depends on external factors, including the crystal and related external components. An externally generated clock also can feed the OSC1 pin of the crystal oscillator circuit. Connect the external clock to the OSC1 pin and let the OSC2 pin float. 7.4.2 Phase-Locked Loop Circuit (PLL) The PLL is a frequency generator that can operate in either acquisition mode or tracking mode, depending on the accuracy of the output frequency. The PLL can change between acquisition and tracking modes either automatically or manually. 7.4.3 PLL Circuits The PLL consists of these circuits: • Voltage-controlled oscillator (VCO) • Reference divider • Frequency prescaler • Modulo VCO frequency divider • Phase detector • Loop filter • Lock detector Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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