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OMAP3530ECBC 数据表(PDF) 165 Page - Texas Instruments

部件名 OMAP3530ECBC
功能描述  OMAP3530/25 Applications Processor: OMAP 3 Architecture
PDF  264 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

OMAP3530ECBC 数据表(HTML) 165 Page - Texas Instruments

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OMAP3530/25 Applications Processor
www.ti.com
SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009
Table 6-8. GPMC/NOR Flash Interface Switching Characteristics – Asynchronous Mode (continued)
NO.
PARAMETER
1.15 V
1.0 V
0.9 V
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
FA9
td(AV-nCSV)
Delay time, address
J(9) – 0.2
J(9) + 2.0
J(9) – 0.2
J(9) + 2.6
J(9) – 0.2
J(9) + 3.7
ns
bus valid to
gpmc_ncsx(13) valid
FA10
td(nBEV-nCSV)
Delay time,
J(9) – 0.2
J(9) + 2.0
J(9) – 0.2
J(9) + 2.6
J(9) – 0.2
J(9) + 3.7
ns
gpmc_nbe0_cle,
gpmc_nbe1 valid to
gpmc_ncsx(13) valid
FA12
td(nCSV-nADVV)
Delay time,
K(10) – 0.2
K(10) + 2.0
K(10) – 0.2
K(10) + 2.6
K(10) – 0.2
K(10) + 3.7
ns
gpmc_ncsx(13) valid to
gpmc_nadv_ale valid
FA13
td(nCSV-nOEV)
Delay time,
L(11) – 0.2
L(11) + 2.0
L(11) – 0.2
L(11) + 2.6
L(11) – 0.2
L(11) + 3.7
ns
gpmc_ncsx(13) valid to
gpmc_noe valid
FA14
td(nCSV-IODIR)
Delay time,
L(11) – 0.2
L(11) + 2.0
L(11) – 0.2
L(11) + 2.6
L(11) – 0.2
L(11) + 3.7
ns
gpmc_ncsx(13) valid to
gpmc_io_dir high
FA15
td(nCSV-IODIR)
Delay time,
M(14) – 0.2
M(14) + 2.0
M(14) – 0.2
M(14) + 2.6
M(14) – 0.2
M(14) + 3.7
ns
gpmc_ncsx(13) valid to
gpmc_io_dir low
FA16
tw(AIV)
Address invalid
G(7)
G(7)
G(7)
ns
duration between 2
successive R/W
accesses
FA18
td(nCSV-nOEIV)
Delay time,
I(8) – 0.2
I(8) + 2.0
I(8) – 0.2
I(8) + 2.6
I(8) – 0.2
I(8) + 3.7
ns
gpmc_ncsx(13) valid to
gpmc_noe invalid
(Burst read)
FA20
tw(AV)
Pulse duration, address
D(4)
D(4)
D(4)
ns
valid – 2nd, 3rd, and
4th accesses
FA25
td(nCSV-nWEV)
Delay time,
E(5) – 0.2
E(5) + 2.0
E(5) – 0.2
E(5) + 2.6
E(5) – 0.2
E(5) + 3.7
ns
gpmc_ncsx(13) valid to
gpmc_nwe valid
FA27
td(nCSV-nWEIV)
Delay time,
F(6) – 0.2
F(6) + 2.0
F(6) – 0.2
F(6) + 2.6
F(6) – 0.2
F(6) + 3.7
ns
gpmc_ncsx(13) valid to
gpmc_nwe invalid
FA28
td(nWEV-DV)
Delay time, gpmc_ new
2.0
2.6
3.7
ns
valid to data bus valid
FA29
td(DV-nCSV)
Delay time, data bus
J(9) – 0.2
J(9) + 2.0
J(9) – 0.2
J(9) + 2.6
J(9) – 0.2
J(9) + 3.7
ns
valid to gpmc_ncsx(13)
valid
FA37
td(nOEV-AIV)
Delay time, gpmc_noe
2.0
2.6
3.7
ns
valid to
gpmc_a[16:1]_d[15:0]
address phase end
(1) For single read: A = (CSRdOffTime – CSOnTime) * (TimeParaGranularity + 1) * GPMC_FCLK
For single write: A = (CSWrOffTime – CSOnTime) * (TimeParaGranularity + 1) * GPMC_FCLK
For burst read: A = (CSRdOffTime – CSOnTime + (n – 1) * PageBurstAccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK
For burst write: A = (CSWrOffTime – CSOnTime + (n – 1) * PageBurstAccessTime) * (TimeParaGranularity + 1) * GPMC_FCLK with n
being the page burst access number
(2) For reading: B = ((ADVRdOffTime – CSOnTime) * (TimeParaGranularity + 1) + 0.5 * (ADVExtraDelay – CSExtraDelay)) * GPMC_FCLK
For writing: B = ((ADVWrOffTime – CSOnTime) * (TimeParaGranularity + 1) + 0.5 * (ADVExtraDelay – CSExtraDelay)) * GPMC_FCLK
(3) C = ((OEOffTime – CSOnTime) * (TimeParaGranularity + 1) + 0.5 * (OEExtraDelay – CSExtraDelay)) * GPMC_FCLK
(4) D = PageBurstAccessTime * (TimeParaGranularity + 1) * GPMC_FCLK
(5) E = ((WEOnTime – CSOnTime) * (TimeParaGranularity + 1) + 0.5 * (WEExtraDelay – CSExtraDelay)) * GPMC_FCLK
(6) F = ((WEOffTime – CSOnTime) * (TimeParaGranularity + 1) + 0.5 * (WEExtraDelay – CSExtraDelay)) * GPMC_FCLK
(7) G = Cycle2CycleDelay * GPMC_FCLK
(8) I = ((OEOffTime + (n – 1) * PageBurstAccessTime – CSOnTime) * (TimeParaGranularity + 1) + 0.5 * (OEExtraDelay – CSExtraDelay)) *
GPMC_FCLK
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TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS
165



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