OMAP3530ECBC datasheet(236/264 Pages) TI1

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6.7.1.2 MMC/SD/SDIO in High-Speed MMC Mode

OMAP3530/25 Applications Processor

SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009

www.ti.com

Table 6-119. MMC/SD/SDIO Switching Characteristics – SD Identification Mode (continued)

NO.

PARAMETER

1.15 V

1.0 V

UNIT

MIN

MAX

MIN

MAX

tW(clkH)

Fall time, output clk

tW(clkL)

Rise time, output data

tdc(clk)

Fall time, output data

HSSD5/SD5

td(CLKOH-CMD)

Delay time, mmc3_clk rising clock edge to

6.3

2492.7

6.3

2492.7

mmc3_cmd transition

Table 6-120. X Parameter

CLKD

1 or Even

0.5

Odd

(trunk[CLKD/2]+1)/CLKD

Table 6-121. Y Parameter

CLKD

1 or Even

0.5

Odd

(trunk[CLKD/2])/CLKD

For details about clock division factor CLKD, see the OMAP35x Technical Reference Manual (TRM)

[literature number SPRUF98].

Table 6-123 and Table 6-124 assume testing over the recommended operating conditions and electrical

characteristic conditions (see Figure 6-63 and Figure 6-64).

Table 6-122. MMC/SD/SDIO Timing Conditions – High-Speed MMC Mode

TIMING CONDITION PARAMETER

VALUE

UNIT

High-Speed MMC Mode

Input Conditions

Input signal rise time

Input signal fall time

Output Conditions

CLOAD

Output load capacitance

Table 6-123. MMC/SD/SDIO Timing Requirements – High-Speed MMC Mode(1)(2)(3)(4)

NO.

PARAMETER

1.15 V

1.0 V

UNIT

MIN

MAX

MIN

MAX

High-Speed MMC Mode

MMC/SD/SDIO Interface 1 (1.8 V IO)

MMC3 tsu(CMDV-CLKIH)

Setup time, mmc1_cmd valid before mmc1_clk

5.6

rising clock edge

MMC4 tsu(CLKIH-CMDIV)

Hold time, mmc1_cmd valid after mmc1_clk

2.3

1.9

rising clock edge

MMC7 tsu(DATxV-CLKIH)

Setup time, mmc1_datx valid before mmc1_clk

5.6

rising clock edge

MMC8 tsu(CLKIH-DATxIV)

Hold time, mmc1_datx valid after mmc1_clk

2.3

1.9

rising clock edge

(1)

Timing parameters are referred to output clock specified in Table 6-124.

(2)

The timing requirements are assured for the cycle jitter and duty cycle error conditions specified in Table 6-124.

(3)

Corresponding figures showing timing parameters are common with Standard MMC mode (See Figure 6-63 and Figure 6-64)

(4)

In datx, x is equal to 1, 2, 3, 4, 5, 6, or 7.

TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS

236

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