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OMAP3530ECBC 数据表(PDF) 101 Page - Texas Instruments

部件名 OMAP3530ECBC
功能描述  OMAP3530/25 Applications Processor: OMAP 3 Architecture
PDF  264 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

OMAP3530ECBC 数据表(HTML) 101 Page - Texas Instruments

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2.5.3
Serial Communication Interfaces
OMAP3530/25 Applications Processor
www.ti.com
SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009
Table 2-11. Serial Communication Interfaces – HDQ/1-Wire Signals Description
SIGNAL
DESCRIPTION
TYPE(1)
BALL BOTTOM
BALL BOTTOM
BALL BOTTOM
NAME
(CBB Pkg.)
(CBC Pkg.)
(CUS Pkg.)
hdq_sio
Bidirectional HDQ 1-Wire control and data
IOD
J25
J23
A24
Interface. Output is open drain.
(1)
Type = Ball type for this specific function (I = Input, O = Output, Z = high-impedance, D = Open Drain, DS = Differential, A = Analog).
Table 2-12. Serial Communication Interfaces – I2C Signals Description
SIGNAL NAME
DESCRIPTION
TYPE(1)
BALL BOTTOM
BALL BOTTOM
BALL BOTTOM
(CBB Pkg.)
(CBC Pkg.)
(CUS Pkg.)
INTER-INTEGRATED CIRCUIT INTERFACE (I2C1)
i2c1_scl
IOD
K21
J25
K20
I2C Master Serial clock. Output is open
drain.
i2c1_sda
IOD
J21
J24
K21
I2C Serial Bidirectional Data. Output is
open drain.
INTER-INTEGRATED CIRCUIT INTERFACE (I2C3)
i2c3_scl
IOD
AF14
AB4
AC13
I2C Master Serial clock. Output is open
drain.
i2c3_sda
IOD
AG14
AC4
AC12
I2C Serial Bidirectional Data. Output is
open drain.
i2c3_sccbe
Serial Camera Control Bus Enable
O
J25
J23
A24
INTER-INTEGRATED CIRCUIT INTERFACE (I2C2)
i2c2_scl
IOD
AF15
C2
AC15
I2C Master Serial clock. Output is open
drain.
i2c2_sda
IOD
AE15
C1
AC14
I2C Serial Bidirectional Data. Output is
open drain.
i2c2_sccbe
Serial Camera Control Bus Enable
O
J25
J23
A24
(1)
Type = Ball type for this specific function (I = Input, O = Output, Z = high-impedance, D = Open Drain, DS = Differential, A = Analog).
Table 2-13. Serial Communication Interfaces – SmartReflex Signals Description(1)
SIGNAL NAME
DESCRIPTION
TYPE(2)
BALL BOTTOM
BALL BOTTOM
BALL BOTTOM
(CBB Pkg.)
(CBC Pkg.)
(CUS Pkg.)
INTER-INTEGRATED CIRCUIT INTERFACE (I2C4)
i2c4_scl
IOD
AD26
AD15
Y16
I2C Master Serial clock. Output is open
drain.
i2c4_sda
IOD
AE26
W16
Y15
I2C Serial Bidirectional Data. Output is
open drain.
(1)
For more information on SmartReflex voltage control, see the PRCM chapter of the OMAP35x Technical Reference Manual (TRM)
[literature number SPRUFA5].
(2)
Type = Ball type for this specific function (I = Input, O = Output, Z = high-impedance, D = Open Drain, DS = Differential, A = Analog).
Table 2-14. Serial Communication Interfaces – McBSP LP Signals Description
SIGNAL NAME
DESCRIPTION
TYPE(1)
BALL BOTTOM
BALL BOTTOM
BALL BOTTOM
(CBB Pkg.)
(CBC Pkg.)
(CUS Pkg.)
MULTICHANNEL SERIAL (McBSP LP 1)
mcbsp1_dr
Received serial data
I
U21
T20
Y18
mcbsp1_clkr
Receive Clock
IO
Y8 / Y21
U19 / H3
V7 / W19
mcbsp1_fsr
Receive frame synchronization
IO
AA21
V17
AB20
mcbsp1_dx
Transmitted serial data
IO
V21
U17
W18
mcbsp1_clkx
Transmit clock
IO
W21
T17
V18
mcbsp1_fsx
Transmit frame synchronization
IO
K26
P20
AA19
mcbsp_clks
External clock input (shared by McBSP1, 2,
I
T21
T19
AA18
3, 4, and 5)
(1)
Type = Ball type for this specific function (I = Input, O = Output, Z = high-impedance, D = Open Drain, DS = Differential, A = Analog)
Submit Documentation Feedback
TERMINAL DESCRIPTION
101



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