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OMAP3530ECBC 数据表(PDF) 114 Page - Texas Instruments |
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OMAP3530ECBC 数据表(HTML) 114 Page - Texas Instruments |
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114 / 264 page  2.5.8 Power Supplies OMAP3530/25 Applications Processor SPRS507F – FEBRUARY 2008 – REVISED OCTOBER 2009 www.ti.com Table 2-25. Power Supplies Signals Description(1) SIGNAL NAME DESCRIPTION BALL BOTTOM BALL TOP BALL BOTTOM BALL TOP BALL BOTTOM (CBB Pkg.) (CBB Pkg.) (CBC Pkg.) (CBC Pkg.) (CUS Pkg.) vdd_mpu_iva ARM/IVA power Y9 / W9 / T9 / R9 / NA H7/ N7/ U7/ V7/ N8/ NA W13/ W12/ V13/ domain M9 / L9 / J9 / Y10 / G9/ L9/ M9/ W9/ Y9/ V12/ U13/ U12/ T8/ U10 / T10 / R10 / M10/ P10/ K11/ U11/ T7/ R8/ R7/ R6/ N8/ N10 / M10 / L10 / V11/ Y11/ G12/ D13/ N7/ N6/ M12/ M8/ J10 / Y11 / W11 / U13 M7/ M6/ L12/ L11/ K11 / J11 / W12 / J10/ J9/ H10/ H9/ K13 / Y14 / K14 / G10/ G9/F10 J14 / Y15 / W15 / J15 vdd_core Core power domain AC4 / J4 / H4 / D8 / NA M7/ T7/ Y8/ G11/ Y12/ NA T20/ T19/ T18/ T17/ AE9 / D9 / D15 / D15/ M17/ G18/ H20/ R19/ R18/ R17/ Y16 / AE18 / Y18 / R20/ AC21 M15/ M14/ L15/ W18 / K18 / J18 / L14/ K19/ K18/ K17/ AE19 / Y19 / U19 / J18/ J17/ H13/ H12/ T19 / N19 / M19 / G13/ G12/ F13/ F12 J19 / Y20 / W20 / V20 / U20 / P20 / N20 / K20 / J20 / D22 / D23 / AE24 / M25 / L25 / E25 cap_vdd_wkup Wakeup/EMU/memor AA15 NA K14 NA Y12 y domains, connect capacitor cap_vdd_d Decoupling capacitor AH20 NA AE19 NA NA vdds_dpll_dll DLL IO power K15 NA K13 NA G18 domain (1.8 V): internal connection to PLL_VDDS, power supply for 3PLL (1.8 V) vdda_dac Video DAC power V25 NA V25 NA AB13 plane vssa_dac Video DAC ground Y26 NA V24 NA AB15 plane vdds IO power plane AD3 / AD4 / W4 / NA G4/ M4/ T4/ Y4/ L7/ NA Y9 / W10 / W9 / AF8 / AE8 / AF16 / AC7/ D9/ AE10/ C11/ V10 / V9 / U10 / AE16 / AF23 / J15/ AC15/ A18/ J18/ N19 / N18 / N17 / AE23 / F25 / F26 / AC18/ AD20/ E24/ M19 / M18 / M17 AG27/ AE27/ AG20/ L24/ T24/ W24/ AC24 H28/ AG21 vdds_mem Memory IO power U1 / J1 / F1 / J2 / AC5 / P1 / H1 / F23 K8 / K7 / K6 / J8 / plane F2 / R4 / B5 / A5 / / E1 / C23 / A4 / A7 J7 / J6 / H15 / G16 AH6 / B8 / A8 / B12 / A10 / A15 / A18 / G15 / F16 / F15 / / A12 / D16 / C16 / E16 B18 / A18 / B22 / A22 / G28 / C28 vdds_dpll_per Peripheral DPLLs AA16 NA U14 NA U17 power rail vdds_wkup_bg For wakeup LDO and AA14 NA W14 NA AA13 VDDA (2 LDOs SRAM and BG) (1) NA in this table stands for "Not applicable". 114 TERMINAL DESCRIPTION Submit Documentation Feedback |
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