| 数据搜索系统,热门电子元器件搜索 |
|
ADT7320UCPZ-R2 数据表(PDF) 16 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADT7320UCPZ-R2 数据表(HTML) 16 Page - Analog Devices |
|
16 / 24 page ![]() ADT7320 Data Sheet Rev. 0 | Page 16 of 24 THYST SETPOINT REGISTER The 8-bit THYST setpoint register (Register Address 0x05) stores the temperature hysteresis value for the THIGH, TLOW, and TCRIT temperature limits. The temperature hysteresis value is stored in straight binary format using the four LSBs. Increments are possible in steps of 1°C from 0°C to 15°C. The value in this register is subtracted from the THIGH and TCRIT values and added to the TLOW value to implement hysteresis. The default setting for the THYST setpoint is 5°C. THIGH SETPOINT REGISTER The 16-bit THIGH setpoint register (Register Address 0x06) stores the overtemperature limit value. An overtemperature event occurs when the temperature value stored in the temperature value register exceeds the value stored in this register. The INT pin is activated if an overtemperature event occurs. The temperature is stored in twos complement format with the most significant bit being the temperature sign bit. The default setting for the THIGH setpoint is 64°C. TLOW SETPOINT REGISTER The 16-bit TLOW setpoint register (Register Address 0x07) stores the undertemperature limit value. An undertemperature event occurs when the temperature value stored in the temperature value register is less than the value stored in this register. The INT pin is activated if an undertemperature event occurs. The temperature is stored in twos complement format with the MSB being the temperature sign bit. The default setting for the TLOW setpoint is 10°C. Table 12. THYST Setpoint Register (Register Address 0x05) Bit(s) Default Value Type Name Description [3:0] 0101 R/W THYST Hysteresis value, from 0°C to 15°C. Stored in straight binary format. The default setting is 5°C. [7:4] 0000 R/W N/A N/A = not applicable. Not used. Table 13. THIGH Setpoint Register (Register Address 0x06) Bit(s) Default Value Type Name Description [15:0] 0x2000 R/W THIGH 16-bit overtemperature limit, stored in twos complement format. Table 14. TLOW Setpoint Register (Register Address 0x07) Bit(s) Default Value Type Name Description [15:0] 0x0500 R/W TLOW 16-bit undertemperature limit, stored in twos complement format. |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |