IRSM836-024MATR datasheet(11/19 Pages) IRF

11 / 19 page

IRSM836-024MA

www.irf.com

February 3, 2013

Fault Reporting and Programmable Fault Clear Timer

The IRSM836-024MA provides an integrated fault reporting output and an adjustable fault clear timer.

There are two situations that would cause the IRSM836-024MA to report a fault via the FAULT pin. The first is an

under-voltage condition of VCC and the second is when the ITRIP pin recognizes a fault. Once the fault condition

occurs, the FAULT pin is internally pulled to VSS and the fault clear timer is activated. The fault output stays in the

low state until the fault condition has been removed and the fault clear timer expires; once the fault clear timer

expires, the voltage on the FAULT pin will return to VCC.

The length of the fault clear time period (tFLTCLR) is determined by exponential charging characteristics of

the capacitor where the time constant is set by RRCIN and CRCIN. In Figure 4 where we see that a fault condition

has occurred (UVLO or ITRIP), RCIN and FAULT are pulled to VSS, and once the fault has been removed, the

fault clear timer begins. Figure 5 shows that RRCIN is connected between the VCC and the RCIN pin, while CRCIN is

placed between the RCIN and VSS pins.

Figure 4: RCIN and FAULT pin waveforms

Figure 5: Programming the fault clear timer

The design guidelines for this network are shown in Table 1.

CRCIN

≤1 nF

Ceramic

RRCIN

0.5 MΩ to 2 MΩ

>> RON,RCIN

Table 1: Design guidelines

The length of the fault clear time period can be determined by using the formula below.

(

)













−

RCIN

FLTCLR

VCC

VRCIN

Time

VRCIN,TH

tFLTCLR

VSS

VFAULT

Time

VSS

ITRIP

High

Impedance State

Vcc

HIN (x3)

RCIN

ITRIP

VSS

FAULT

VRx

LIN (x3)

VB ( x3)

VS (x3)

IRSM836-024MA

I -

RRCIN

CRCIN

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