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AD7621 数据表(PDF) 1 Page - Analog Devices

部件名 AD7621
功能描述  18-Bit, 5 MSPS PulSAR Differential ADC
PDF  24 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD7621 数据表(HTML) 1 Page - Analog Devices

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18-Bit, 5 MSPS PulSAR
Differential ADC
Data Sheet
AD7960
Rev. 0
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
FEATURES
Throughput: 5 MSPS
18-bit resolution with no missing codes
Excellent ac and dc performance
Dynamic range: 100 dB
SNR: 99 dB
THD: −117 dB
INL: ±0.8 LSB (typical), ±2 LSB (maximum)
DNL: ±0.5 LSB (typical), ±0.99 LSB (maximum)
True differential analog input voltage range: ±4.096 V or ±5 V
Low power dissipation
46.5 mW at 5 MSPS with external reference buffer
(echoed clock mode)
64.5 mW at 5 MSPS with internal reference buffer
(echoed clock mode)
39 mW at 5 MSPS with external reference buffer
(self clocked mode, CNV± in CMOS mode)
SAR architecture
No latency/pipeline delay
External reference options: 2.048 V buffered to 4.096 V (internal
reference buffer), 4.096 V, and 5 V
Serial LVDS interface
Self clocked mode
Echoed clock mode
LVDS or CMOS option for conversion control (CNV± signal)
Operating temperature range of −40°C to +85°C
32-lead, 5mm × 5mm LFCSP (QFN)
APPLICATIONS
Digital imaging systems
Digital X-rays
Computed tomography
IR cameras
MRI gradient control
High speed data acquisition
Spectroscopy
Test equipment
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
GENERAL DESCRIPTION
The AD7960 is an 18-bit, 5 MSPS, charge redistribution successive
approximation (SAR), analog-to-digital converter (ADC). The
SAR architecture allows unmatched performance both in noise
and in linearity. The AD7960 contains a low power, high speed,
18-bit sampling ADC, an internal conversion clock, and an
internal reference buffer. On the CNV± edge, the AD7960
samples the voltage difference between the IN+ and IN− pins.
The voltages on these pins swing in opposite phase between 0 V
and 4.096 V and between 0 V and 5 V. The reference voltage is
applied to the part externally. All conversion results are available
on a single LVDS self clocked or echoed clock serial interface.
The AD7960 is available in a 32-lead LFCSP (QFN) with
operation specified from −40°C to +85°C.
Table 1. Fast PulSAR® ADC Selection
Input Type
1 MSPS to
<2 MSPS
2 MSPS to
3 MSPS
5 MSPS
to 6 MSPS
10 MSPS
Differential,1
16-Bit
AD7653
AD7985
AD7667
AD7980
AD7983
True Bipolar,
16-Bit
AD7671
Differential,2
16-Bit
AD7677
AD7621
AD7625
AD7626
AD7623
AD7622
AD7961
Differential,2
18-Bit
AD7643
AD7641
AD7960
AD7982
AD7986
AD7984
1
Ground sense.
2
Antiphase.
AD7960
CLOCK
LOGIC
SERIAL
LVDS
IN–
IN+
REFIN
REF
VCM
SAR
÷2
CNV+, CNV–
EN0
D+, D–
DCO+, DCO–
CLK+, CLK–
CAP
DAC
VDD1 VDD2
VIO
EN1
EN2
EN3
GND


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