DSPIC33FJMC202ESS datasheet(106/330 Pages) MICROCHIP

部件名	DSPIC33FJMC202ESS

功能描述	16-bit Digital Signal Controllers (up to 32 KB Flash and 2 KB SRAM) with Motor Control and Advanced Analog

PDF	330 Pages

Scroll/Zoom	100%

制造商	MICROCHIP [Microchip Technology]

网页	http://www.microchip.com

标志

106 / 330 page

dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304

DS70283K-page 106

bit 3

CF: Clock Fail Detect bit (read/clear by application)

1 = FSCM has detected clock failure

0 = FSCM has not detected clock failure

bit 2

Unimplemented: Read as ‘0’

bit 1

LPOSCEN: Secondary (LP) Oscillator Enable bit

1 = Enable secondary oscillator

0 = Disable secondary oscillator

bit 0

OSWEN: Oscillator Switch Enable bit

1 = Request oscillator switch to selection specified by NOSC<2:0> bits

0 = Oscillator switch is complete

OSCCON: OSCILLATOR CONTROL REGISTER(1,3) (CONTINUED)

Note 1: Writes to this register require an unlock sequence. Refer to Section 7. “Oscillator” (DS70186) in the

“dsPIC33F/PIC24H Family Reference Manual” for details.

2: Direct clock switches between any primary oscillator mode with PLL and FRCPLL mode are not permitted.

This applies to clock switches in either direction. In these instances, the application must switch to FRC

mode as a transition clock source between the two PLL modes.

3: This register is reset only on a Power-on Reset (POR).

DSPIC33FJMC202ESS 数据表(PDF) 106 Page - Microchip Technology